Automatic design of processor datapaths

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Target device

Reexamination Certificate

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C703S001000, C703S022000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06853970

ABSTRACT:
A method for the automatic design of processor datapaths operates on an abstract input specification of desired processor operations and their instruction level parallelism and synthesizes a datapath design in machine readable form. A datapath synthesizer automatically designs and synthesizes the processor datapath including the number and types of functional units, the number of read/write ports of the various register files, and the exact connectivity between the register files and the functional units. The heuristics used in the implementation maximize resource sharing and minimize the overall cost in by customizing and sharing functional units and minimizing the number of read/write ports on the register files subject to the specified ILP among operations.

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