Automatic design method for semiconductor device

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C716S030000

Reexamination Certificate

active

11348493

ABSTRACT:
A positioning region of external terminals is divided into a plurality of positioning sections, and at least one side or perimeter of a chip is assigned to each positioning section. The external terminals in each positioning section are allocated to the perimeter to which the positioning section is assigned. The external terminals allocated to each perimeter are grouped into groups arranged perpendicularly to the perimeter, and pads of the chip are also grouped. The external terminals of the groups are assigned to the pads of the corresponding groups. The external terminals and the pads assigned to each other are connected by linear virtual wirings. Further, it is checked whether the virtual wirings cross each other. If there are crossing virtual wirings, the correspondences between the external terminals and the pads are replaced with each other.

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