Automatic delay adjusting method for semiconductor...

Details Automatic delay adjusting method for semiconductor... Automatic delay adjusting method for semiconductor...

2008-06-18

2011-11-08

Garbowski, Leig (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S113000, C716S130000, C716S134000

Reexamination Certificate

active

08056042

ABSTRACT:
An automatic delay adjusting method of a semiconductor integrated circuit includes placing a dummy wiring to a layout data and connecting the dummy wiring to a target wiring between a first cell and a second cell which is a timing violation occurs for the target wiring in the layout data. The dummy wiring connection includes replacing the dummy wiring with a dummy wiring cell having first and second pins corresponding to both ends of the dummy wiring, cutting the target wiring to generate first and second target wirings, connecting the first and second target wirings to the first and second pins, respectively, and replacing the dummy wiring cell with the dummy wiring to provide a wiring that is connected with the dummy wiring to the cut target wiring.

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