Automatic creation of vias in electrical circuit design

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Pcb – mcm design

Reexamination Certificate

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C716S130000

Reexamination Certificate

active

08086991

ABSTRACT:
This invention is directed to a methodology of creating and detecting crossings of conductive traces on different layers of an integrated circuit or a conducting trace over a device contact during a system. Values are stored by the system simulator corresponding to the galvanic potential or same “net,” and then by a set of rule based instructions the vias are automatically displayed, correct-by-construction, and via connections between the traces, or the trace and device contact, to short circuit the paths. The via structure will not be created if it will short-circuit a conducting trace not associated with the net in question. By connecting traces on different layers using automatically created via structures so as not to short circuit other net traces, errors are eliminated and design cycles reduced when compared to a manual design scheme of inserting via connections. There is a number of useful variations that can be applied to the via structure automatically created. There is also an interactive mode which allows the via to be easily resized by the use of familiar control handles.

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