Boots – shoes – and leggings
Patent
1994-08-02
1996-09-10
Trammell, James P.
Boots, shoes, and leggings
364240, 3642401, 36492792, 307 38, 361 58, H02H 900
Patent
active
055555101
ABSTRACT:
A method applicable to a host computer system having a system bus connected to a CPU, and a PCMCIA controller having status registers, means for supplying back off signals to the CPU and line buffers capable of being in a normal and high impedance state. A multi pin connector is located in each card socket and connected to a line buffer. Each connector has common address, data and control pins, power pins, ground pins longer than the data pins and card detect signal pins shorter than the signal pins. The first step is to detect the commencement of an insertion or removal of a PCMCIA card to or from a socket by monitoring the ground and card detect signal pins. After detection, commence termination of all CPU usage of common address, data and control lines by asserting a back off signal. Next, determine if the usage is terminated by monitoring the status registers in the controller. Next, place the common address, data and control lines in a high impedance state. Next, detect that the PC card has been completely inserted or removed by monitoring the ground pins or the card detect signal pins. Next, apply power to the PCMCIA card socket. After a delay return the common address, data and control lines to their normal operating impedance level.
REFERENCES:
patent: 4443847 (1984-04-01), Bradley et al.
patent: 4485457 (1984-11-01), Balaska et al.
patent: 4589063 (1986-05-01), Shah et al.
patent: 4758951 (1988-07-01), Sznyter, III
patent: 4763333 (1988-08-01), Byrd
patent: 4831522 (1989-05-01), Henderson et al.
patent: 4872139 (1989-10-01), Okamoto et al.
patent: 4907150 (1990-03-01), Arroyo et al.
patent: 4956766 (1990-09-01), Dhopeshwarkar et al.
patent: 4982360 (1991-01-01), Johnson et al.
patent: 4999787 (1991-03-01), McNally et al.
patent: 5029077 (1991-07-01), Fatahalian et al.
patent: 5109510 (1992-04-01), Baker et al.
patent: 5109521 (1992-04-01), Culley
patent: 5123098 (1992-06-01), Gunning et al.
patent: 5126890 (1992-06-01), Wade et al.
patent: 5136712 (1992-08-01), Perazzoli, Jr. et al.
patent: 5158473 (1992-10-01), Takahashi et al.
patent: 5161169 (1992-11-01), Galano et al.
patent: 5161992 (1992-11-01), Birch
patent: 5182805 (1993-01-01), Campbell
patent: 5204840 (1993-04-01), Mazur
patent: 5210855 (1993-05-01), Bartol
patent: 5220211 (1993-06-01), Christopher et al.
patent: 5247619 (1993-09-01), Mutoh et al.
patent: 5247682 (1993-09-01), Kondou et al.
patent: 5255379 (1993-10-01), Melo
patent: 5257387 (1993-10-01), Richek et al.
patent: 5265252 (1993-11-01), Rawson, III et al.
patent: 5272584 (1993-12-01), Austruy et al.
patent: 5276888 (1994-01-01), Kardach et al.
patent: 5291585 (1994-03-01), Sato et al.
patent: 5291604 (1994-03-01), Kardach et al.
patent: 5297282 (1994-03-01), Meilak et al.
patent: 5303378 (1994-04-01), Cohen
patent: 5378930 (1995-01-01), Kuchenreuther
patent: 5379437 (1995-01-01), Celi, Jr. et al.
patent: 5386567 (1995-01-01), Lien et al.
Carr, Microcomputer Interfacing Handbook: A/D & D/A, 1980, pp. 295-296.
Device Driver `Stubs` Smooth Path to Top SCSI Performance, by Steve Gibson, Nov. 19, 1990, IDG Communications, Inc., InfoWorld.
Computer Architecture: A Quantitative Approach, by John L. Hennessy and David A. Patterson, 1990, Chapter 8, pp. 433-449.
Lam Fong-Shek
Shah Prasanna
Verseput Jerry
Assouad Patrick J.
Intel Corporation
Trammell James P.
LandOfFree
Automatic computer card insertion and removal algorithm does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Automatic computer card insertion and removal algorithm, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Automatic computer card insertion and removal algorithm will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1329730