Automatic clock positioning circuit for a digital data transmiss

Details Automatic clock positioning circuit for a digital data transmiss Automatic clock positioning circuit for a digital data transmiss

1978-12-04

1980-08-19

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

371 61, H03D 324

Patent

active

042187710

ABSTRACT:
The phase of the clock timing pulses are continuously optimized relative to the received signal under the control of pseudo-error detectors.

REFERENCES:
patent: 3407356 (1968-10-01), Meranda
patent: 3557308 (1971-01-01), Alexander et al.
patent: 3633115 (1972-01-01), Epstein
patent: 3721959 (1973-03-01), George
patent: 3961311 (1976-01-01), Pavoni et al.
patent: 3989894 (1976-02-01), Charransol et al.
IEEE Transactions on Communication Technology, vol. COM-16, pp. 380-387, Jun. 1968--"Performance Monitor Techniques for Digital Receivers Based on Extrapolation of Error Rate" by D. J. Godding.
IEEE Transactions on Communication Technology, vol. COM-19, pp. 1149-1155, Dec. 1971--"Estimation of Small Probabilities by Linearization of the Tail of a Probability Distribution Function" by S. B. Weinstein.
IEEE Transactions on Communications, vol. COM-23, pp. 518-525, May, 1975, "A Bit Error Rate Monitor for Digital PSK Links" by B. J. Leon, H. L. Hammond, Jr., P. A. Vena, W. E. Sears, III and R. T. Kitahara.

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