Automatic clock phase selector

Facsimile and static presentation processing – Static presentation processing – Attribute control

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Details

358 21R, 358 27, 358178, H04N 946

Patent

active

043463983

ABSTRACT:
An automatic clock phase selector for applying input pulses of selected phases to a counter to enable an AGC gate generator and a burst-gate generator during selected time intervals is described. The automatic clock phase selector includes a generator for generating a train of true clock pulses and a train of complementary clock pulses. A pulse train selector receives these clock pulse trains and a flyback pulse. The pulse train selector is responsive to the time coincidence between a selected edge of the flyback pulse and the positive or negative portion of a true clock pulse for coupling a selected train of clock pulses to the counter. In this manner, the intervals during which the AGC gate generator and the burst-gate generator are enabled track with the occurrence of the selected edge of the flyback pulse.

REFERENCES:
patent: 4263610 (1981-04-01), Shanley et al.

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