Automatic clock de-skewing apparatus

Details Automatic clock de-skewing apparatus Automatic clock de-skewing apparatus

1987-06-30

1988-07-05

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307602, 307606, 307591, 328 55, H03K 513, H03K 5159

Patent

active

047557044

ABSTRACT:
Apparatus for providing automatic clock de-skewing for a plurality of circuit boards of a data processing system. In a preferred embodiment, each circuit board is of multi-layer construction and contains a clock distribution chip which includes on-chip automatic clock de-skewing circuitry for providing de-skewed clocks to other chips on the circuit board. In a preferred implementation of the clock de-skewing circuitry, feedback circuitry including a multi-tapped delay line and an accurate reference delay are employed in conjunction with a phase comparator for automatically providing de-skewed clocks at the clock outputs of the clock distribution chip. The accurate reference delay is advantageously provided by a strip transmission line formed in a conductive layer of the multi-layer board containing the chips.

REFERENCES:
patent: 4047132 (1977-09-01), Krajewski
patent: 4447870 (1984-05-01), Tague et al.
patent: 4479216 (1984-10-01), Krambeck et al.
patent: 4488297 (1984-12-01), Vaid
patent: 4560962 (1985-12-01), Barrow
patent: 4623805 (1986-11-01), Flora et al.
patent: 4637018 (1987-01-01), Flora et al.

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