Automatic circuit layout router

Details Automatic circuit layout router Automatic circuit layout router

1987-06-24

1989-07-25

Lall, Parshotam S.

Boots, shoes, and leggings

364490, 364489, 364488, G06F 1520

Patent

active

048520152

ABSTRACT:
A method for operating a digital computer to globally route interconnects between terminals of a gate array. A first terminal closest to an average position of terminals to be interconnected is identified. A second terminal closest to the first terminal is then identified, and a first path between the first and second terminals is established along possible paths. An edge of the first path is set as a routing path if predetermined conditions are met. A closest remaining terminal to an established path is next identified, and a shortest path between the closest terminal and the established path to which it was closest is established. Edges of the shortest path and/or the established path to which it was closest are set as routing paths, if predetermined conditions are met. The above steps are then repeated for remaining terminals to be interconnected. Any possible paths within established paths with no set edges can then be set as routing paths.

REFERENCES:
patent: 4093990 (1978-06-01), Koller et al.
patent: 4541114 (1985-09-01), Rutenbar et al.
patent: 4580228 (1986-04-01), Noto
patent: 4584653 (1986-04-01), Chih et al.
patent: 4613941 (1986-09-01), Smith et al.
patent: 4651284 (1987-03-01), Watanabe et al.
"Theory and Concepts of Circuit Layout", T. C. Hu et al., IEEE Press, 1985, pp. 3-18.
"A Routing Program Applicable to Various Chip Structures of Gate Arrays", Masayuki Terai et al., Ronbunshi, vol. 25, No. 3, May, 1984, pp. 357-364.
Howard E. Krohn, "An Over-Cell Array Channel Router", Published as Paper 41.1 of IEEE 20th Design Automation Conference, 1983, pp. 665-670.

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