Automatic cache flush

Details Automatic cache flush Automatic cache flush

1991-12-19

1995-05-09

Elmore, Reba I.

Boots, shoes, and leggings

3642435, 364DIG1, G06F 1212

Patent

active

054148278

ABSTRACT:
According to the invention, a chipset is provided which powers up in a default state with caching disabled and which writes permanently non-cacheable tags into tag RAM entries corresponding to memory addresses being read while caching is disabled. Even though no "valid" bit is cleared, erroneous cache hits after caching is enabled are automatically prevented since any address which does match a tag in the tag RAM, is a non-cacheable address and will force retrieval directly from main memory anyway.

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