Automatic aspect ratio converting apparatus for television...

Television – Format conversion – Conversion between standards with different aspect ratios

Reexamination Certificate

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Details

C348S556000

Reexamination Certificate

active

06226039

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to an automatic picture aspect ratio conversion for a television receiver. In particular, the present invention relates to an automatic aspect ratio (AR) detecting method and AR compensating apparatus for a television receiver having a double window function whereby the ARs of two different video sources are detected, and if the detected ARs are different from each other, they are respectively converted into those most suitable for being displayed as double window pictures on a screen of the television receiver.
A conventional AR converting apparatus for a television receiver, as shown in
FIG. 1
, includes a sync separating section
10
for separating a sync signal from an input luminance signal Y, a pulse generating section
20
for generating a pulse signal for pedestal clamping utilizing the sync signal outputted from the sync separating section
10
, a luminance detecting section
30
for detecting existence
onexistence of the luminance signal in accordance with the pedestal clamping pulse signal generated from the pulse-generating section
20
, a latch
40
for temporarily storing data for existence
onexistence of the luminance signal outputted from the luminance detecting section
30
, a dedicated microcomputer
50
for aspect ratio conversion (ARC) for receiving the data for existence
onexistence of the luminance signal from the latch
40
and detecting the width of a horizontal scanning line during a vertical sync signal period to detect the AR of an input video signal, and a main microcomputer
60
for compensating for deflection data in accordance with the AR detected by the ARC-dedicated microcomputer
50
.
Meanwhile, a typical television receiver having a double window function, as shown in
FIG. 3
, includes main-channel and sub-channel decoders
101
and
102
for decoding an input main-channel composite video signal MCVBS and sub-channel composite video signal SCVBS, respectively, a controller
103
for clamping, filtering, and data-processing the composite video signals decoded by the main-channel and sub-channel decoders
101
and
102
, a video random access memory (RAM)
104
for storing and outputting data processed through the controller
103
, an amplifying section
105
for amplifying video signals of Y, U, V and R, G, B processed through the controller
103
to a level suitable to be displayed, and a switching and deflection section
106
for switching the video signals amplified through the amplifying section
105
and controlling the deflection of a cathode ray tube in horizontal and vertical directions to display the double window pictures.
The controller
103
, as shown in
FIG. 4
, comprises clamp and analog-to-digital (A/D) conversion sections
201
and
301
for clamping and converting the main-channel and sub-channel composite video signals into digital data, respectively, horizontal/vertical filters
202
and
302
for filtering the data converted through the clamp and A/D conversion sections
201
and
301
in horizontal and vertical directions, line memories
203
and
303
for storing the data filtered through the horizontal/vertical filters
202
and
302
line-by-line, phase-locked loop (PLL) and clock generating sections
204
and
304
for controlling the operating timing of the respective circuit blocks, an external memory control section
205
for storing the data provided from the line memories
203
and
303
in an external memory (i.e., the video RAM), reformatting the data stored in the external memory, and storing the reformatted data in a line memory
206
line-by-line, and a display control section
207
for controlling a digital-to-analog (D/A) conversion and buffering section
208
so that the section
208
converts the data from the line memory
206
into an analog video signal, and buffers the converted analog video signal to display the analog video signal on the display screen.
The operation of the conventional ARC apparatus for a doublewindow television receiver as constructed above will now be explained.
Referring to
FIG. 1
, the sync separating section
10
separates the sync signal from the input luminance signal Y and outputs the separated sync signal to the pulse generating section
20
. The pulse generating section
20
generates the pedestal clamping pulse signal utilizing the sync signal.
The luminance detecting section
30
produces a reference voltage in accordance with the pedestal clamping pulse signal outputted from the pulse generating section
20
and detects the existence
onexistence of the luminance signal by comparing the reference voltage with the luminance signal level during a horizontal scanning period.
The data for the existence
onexistence of the luminance signal is inputted to the latch
40
, and thus the ARC-dedicated microcomputer
50
enters into a rising edge interrupt mode during a vertical sync signal period as shown in FIG.
2
. In the rising edge interrupt mode, the ARC-dedicated microcomputer
50
counts the number of the horizontal sync pulses H-sync until the rising edge of the data inputted from the latch
40
is detected in order to detect the point where a horizontal scanning line having the luminance signal starts. At this time, if the luminance signal exists, the data becomes a ‘high’ level, while if the luminance signal does not exist, the data becomes a ‘low’ level.
If the rising edge is detected during the counting operation of the horizontal sync pulses, the currently counted value will correspond to a start point.
If the start point is detected as above, the ARC-dedicated microcomputer
50
resets the currently counted value, enters into a falling edge interrupt mode, and counts the number of the horizontal sync pulses until the falling edge of the data is detected.
If the falling edge is detected during the counting operation of the horizontal sync pulses, the currently counted value will correspond to an end point.
As a result, the interval between the start point and the end point which are detected by counting the horizontal sync pulses will be the width of the horizontal sync signal. The horizontal data regarding the width of the horizontal sync signal is outputted to the main microcomputer
60
to compensate for the deflection data of the deflection circuit.
Meanwhile, the operation of the conventional television receiver having a double window function will now be explained.
Referring to
FIG. 3
, the main-channel and sub-channel decoders
101
and
102
receive and decode the main-channel and sub-channel composite video signals MCVBS and SCVBS, respectively, and output the decoded signals to the controller
103
.
Referring to
FIG. 4
, the clamp and A/D conversion sections
201
and
202
in the controller
103
clamp the main-channel and sub-channel video signals outputted from the main-channel and sub-channel decoders
101
and
102
, and convert the clamped video signals into video data, respectively. The horizontal/vertical filters
202
and
302
filter the converted video data, respectively, and the line memories
203
and
303
store therein the filtered data line-by-line, respectively.
The PLL and clock generating sections
204
and
304
control the operating timing of the respective circuit blocks in the controller
103
.
The external memory control section
205
stores the video data in putted from the line memories
203
and
303
in the external memory, reformats the stored data, and stores the reformatted data in the line memory
206
line-by-line.
The display control section
207
controls the D/A conversion and buffering section
208
so that the D/A conversion and buffering section
208
converts the data inputted from the line memory
206
into an analog video signal and buffers the converted analog signal.
The video signals of Y, U, V and R, G, B processed by the controller
103
are amplified through the amplifying section
105
to the level suitable to be displayed, and the amplified video signals are outputted to the switching and deflection section
106
. Accordingly, the

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