Automated protection of IC devices from EOS (electro over...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

active

06392432

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to test stations for IC (integrated circuit) devices, and more particularly, to a system and method for auto automatically protecting the IC devices from EOS (electro over stress) damage due to occurrence of an undesired DC transient during testing of the IC devices at a test station.
BACKGROUND OF THE INVENTION
During manufacture of IC (integrated circuit) devices, such IC devices are tested at various test stations for determining various performance characteristics of such IC devices. Referring to
FIG. 1
, one example of such a test station is a burn-in test station
100
for determining the burn-in life time of the IC devices, as known to one of ordinary skill in the art of integrated circuit manufacture. The burn-in life time is a measure of the time period for which an IC device operates properly when the IC device is heated up from room temperature to a raised temperature such as about 125° Celsius or about 150° Celsius, for example, as known to one of ordinary skill in the art of integrated circuit manufacture.
Referring to
FIG. 1
, the burn-in test station
100
includes a testing board
102
which is placed inside an oven
104
having a heating element
106
for heating up the temperature within the oven
104
. The testing board
102
includes a plurality of sockets including a first socket
112
, a second socket
114
, a third socket
116
, a fourth socket
118
, a fifth socket
120
, and a sixth socket
122
. Each of the sockets
112
,
114
,
116
,
118
,
120
, and
122
holds an IC device during the determination of the burn-in life time of the IC devices A burn-in test station typically has more numerous sockets but six sockets are shown in the testing board
102
of
FIG. 1
for clarity of illustration.
A temperature controller
130
coupled to the heating element
106
controls the heating element to set the temperature within the oven such that the IC devices within the sockets
112
,
114
,
116
,
118
,
120
, and
122
of the testing board
102
heat up from room temperature to a raised temperature such as about 125° Celsius or about 150° Celsius, for example.
With such heating up of the IC devices, a DC (direct current) voltage (V
cc
) is applied from a power voltage supply
132
to some pins of the IC devices within the sockets
112
,
114
,
116
,
118
,
120
, and
122
of the testing board
102
. In addition, another DC (direct current) voltage (V
bb
) is applied from a biasing voltage supply
134
to other pins of the IC devices within the sockets
112
,
114
,
116
,
118
,
120
, and
122
of the testing board
102
. The voltage from the power voltage supply
132
and the biasing voltage supply
134
are used for biasing the IC devices for proper operation of the IC devices, as known to one of ordinary skill in the art of electronics.
With such proper biasing of the IC devices within the sockets
112
,
114
,
116
,
118
,
120
, and
122
of the testing board
102
, driving signals such as clock signals for example are coupled from a signal driver source
136
to the IC devices, as known to one of ordinary skill in the art of electronics. With such heating of the IC devices to the predetermined raised temperature and with proper biasing of the IC devices, the driving signals are repeatedly applied on the IC devices to measure a time period during which the IC devices operate properly. Such a time period is the burn-in life time of the IC devices determined by the burn-in test station
100
.
During such a testing procedure within the burn-in test station
100
, a DC transient may occur at various components of the burn-in test station
100
. As illustrated in
FIG. 2
, a DC transient
202
is a sudden rise in voltage signal with time. For example, the DC transient
202
may include a voltage increase of about 7 volts.
The DC transient
202
may occur at the node of the power voltage supply
132
that is coupled to the IC devices within the sockets
112
,
114
,
116
,
118
,
120
, and
122
for providing the power voltage V
cc
to the IC devices. In addition, the DC transient
202
may also occur at the node of the biasing voltage supply
134
that is coupled to the IC devices for providing the biasing voltage V
bb
to the IC devices.
Furthermore, the DC transient
202
may also occur at a node of the signal driver source
136
for providing a driving signal to the IC devices. Additionally, the DC transient
202
may also occur at a node of the testing board
102
. For example the testing board
102
typically has a ground plane, as known to one of ordinary skill in the art of electronics. The DC transient
202
may occur at such a ground node of the testing board
102
.
The DC transient
202
may occur at any of such nodes because such nodes are coupled to the general power system of a room having the test station
100
. When a surge of power is drawn within such a power system, such as when another equipment demanding high power is turned on within the room, the DC transient
202
may result at any of the nodes of the power voltage supply
132
, the biasing voltage supply
134
, the signal driver source
136
, and the testing board
102
as described herein.
When the DC transient
202
has a sufficiently high amplitude and/or is of a sufficient duration of time such that the DC transient
202
contributes significant power to the IC devices within the sockets
112
,
114
,
116
,
118
,
120
, and
122
, the IC devices may be damaged due to EOS (electro over stress) failure of the IC devices, as known to one of ordinary skill in the art of integrated circuit manufacture. Such EOS failure may result in premature failure of the IC devices, and the burn-in time of such IC devices may no longer be determined with accuracy.
Thus, a mechanism is desired for automatically protecting the IC devices from EOS (electro over stress) damage due to an undesired DC transient that may occur at a test station such as the burn-in test station.
SUMMARY OF THE INVENTION
Accordingly, in a general aspect of the present invention, nodes of a test station are monitored to detect any undesired DC transient, and a computer controls the components of the test station to properly shut down the test station in a timely manner to automatically protect the IC devices from EOS (electro over stress) damage due to the undesired DC transient.
The test station for testing the IC devices includes a testing board for holding the IC devices during testing of the IC devices. Furthermore, the test station includes at least one voltage supply for biasing the IC devices during testing of the IC devices. In addition, the test station includes a signal driver source for providing driving signals coupled to the IC devices during testing of the IC devices.
In one aspect of the present invention, a system for protecting the IC devices from EOS damage due to the undesired DC transient includes a signal measuring unit that monitors for occurrence of an undesired DC transient at any of the at least one voltage supply, of the signal driver source, and of at least one node of the testing board. The system also includes a data processing unit and a data interface bus coupled between the signal measuring unit and the data processing unit. The signal measuring unit sends, to the data processing unit via the data interface bus, a signal of the undesired DC transient measured at any of the at least one voltage supply, of the signal driver source, and of at least one node of the testing board.
The data processing unit determines whether the signal of the undesired DC transient exceeds threshold characteristics. The data processing unit includes a digital I/O (input/output) controller for controlling components of the test station such that the test station shuts down in a proper sequence when the signal of the undesired DC transient exceeds the threshold characteristics. The threshold characteristics indicate the level of power that may be transferred to the IC devices by the DC transient.
The present invention may be used to particular advanta

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