Automated interconnect routing system

Details Automated interconnect routing system Automated interconnect routing system

1990-08-24

1993-02-16

Trans, Vincent N.

Boots, shoes, and leggings

364489, 364488, G06F 1560

Patent

active

051876710

ABSTRACT:
A method of manufacturing a multiple element circuit interconnect substrate is provided which provides an optimized routing plan. The routing plan is based upon a multi-dimensional binary data structure having nodes representing each terminal interconnect requirement which is preprocessed to order the required interconnects according to density.

REFERENCES:
patent: T944001 (1970-03-01), Hanan et al.
patent: 4593363 (1986-06-01), Burstein et al.
patent: 4815003 (1989-03-01), Putatunda et al.
patent: 4890238 (1989-12-01), Klein et al.
patent: 4908772 (1990-03-01), Chi
patent: 4922432 (1990-05-01), Kobayashi et al.
patent: 4967367 (1990-10-01), Piednoir
"Partitioning and Placement Technique for CMOS Gate Arrays" by G. Odawara et al., IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, CAD 6, No. 3, May 1987, pp. 355-363.
"An Efficient Heuristic Procedure for Partitioning Graphs" by B. W. Kernighan et al., The Bell System Technical Journal, Feb. 1970, pp. 291-307.
Murphy, Daniel, "Maintaining Balance in Complex Board Design, PCB Design", pp. 77-83 (Oct. 1989).
Bently, Jon, "Multidimensional Binary Search Trees Used for Associative Searching, Communications of the ACM", vol. 18, No. 9, pp. 509-517 (Sep. 1975).
Rosenberg, Jonathan, "Geographical Data Structures Compared: A Study of Data Structures Supporting Region Queries", IEEEI Transactions on Computer-Aided Design, vol. CAD-4, No. 1, pp. 53-67 (Jan. 1985).
Suzuki, Kei, et al., "A Gridless Router: Software and Hardware Implementations," International Federation for Information Processing, VLSI 1987 Proceedings.
Kaplan, David, "Routing With a Scanning Window-A Unified Approach", 24th ACM/IEEE Design Automation Conference, pp. 629-632 (1987).
Hu, T. C. et al., "A Decomposition Algorithm for Circuit Routing", VLSI Circuit Layout: Theory and Design, pp. 144-152, IEEE Press (1985).
Hightower, David, "The Interconnection Problem-A Tutorial", Proceedings of Design Automation Workshop, pp. 1-21 (1973).
Smith, Lyle Richard, "An Analysis of Area Routing", Ph.D. Dissentation-Department of Electrical Engineering Stanford University (Feb. 1983).
Dion, Jeremy, "Fast Printed Circuit Board Routing", Proceedings of the 24th ACM/IEEE Design Automation Conference, pp. 727-734 (1987).

Affiliated with

Also associated with

Rating

Automated interconnect routing system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Automated interconnect routing system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Automated interconnect routing system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2152827