Automated coherent clock synthesis for matrix display

Details Automated coherent clock synthesis for matrix display Automated coherent clock synthesis for matrix display

1996-06-18

1997-10-07

Hjerpe, Richard

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

345213, 348464, 348465, 348467, 348468, 348510, 348521, 348522, 348540, G09G 303

Patent

active

056753551

ABSTRACT:
To interface a video/graphic controller, which produces conventional, ana video output signals, suitable mostly for CRT type displays, to a matrix display, one of the video output signals, for example the horizontal sync signal, is encoded with the clock frequency and phase information used in generating the original video output signals. The encoded information is decoded at the display end, by extracting from it the clock information and synthesizing a clock signal which has the identical frequency and phase as the original clock used at the video/graphic controller. The replicated clock signal is used as a clock input to the matrix display, to assure that the video output signals are displayed at the correct pixel locations of the matrix display, preventing picture jitter and/or loss of video/graphics data.

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