Auto-zero switched-capacitor integrator

Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – By integrating

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327561, 327337, 330 9, 333173, H03F 108

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active

054791308

ABSTRACT:
A switched-capacitor auto-zero integrator includes and integrator circuit and a correction circuit. The integrator circuit may be any circuit including an operational amplifier having an input line and an output line, an input capacitor coupled to be charged by an Input voltage, an integrating capacitor coupled to the output line, and at least one integrating switch operable during an integrating time interval to connect the input capacitor to the integrating capacitor such that the integrating capacitor is charged to compensate for charge of the input capacitor. The correction circuit includes an offset capacitor coupled to the input line and at least one correction switch operable in an auto-zero sub-interval: and a correction sub-interval. The sub-intervals occur only during the integrating interval such that the offset capacitor is charged by an offset voltage and a gain error voltage of the operational amplifier during the auto-zero sub-interval and the offset capacitor is connected to a summing node between the input capacitor and the integrating capacitor during the correction sub-interval.

REFERENCES:
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patent: 4393351 (1983-06-01), Gregorian et al.
patent: 4439693 (1984-03-01), Lucas et al.
patent: 5168179 (1992-12-01), Negahban-Hagh
Electronic Letters, vol. 27, No. 24, Nov. 21, 1991 pp. 2277-2279, Shafeeu H. et al. "Novel Amplifier Gain Insensitive Switched Capacitor Integrator with Same Sample Correction Properties".
Proceedings of the International Symposium on Circuits and Systems, Portland May 8, 11, 1989, vol. 3 of 3. May 8, 1989, Institute of Electrical and Electronics Engineers, pp. 1712-1715, XP 000131392.
Chang Jou I et al., "The Characteristic Comparison of Fully Differential Switched Capacitor Biquads" See FIGS. 1 and 2 (Received Complete Copies as Aug. 25, 1995).
Nagaraj, K., Vlach, J., Viswanathan, T. R., and Singhal, K.: "Switched-capacitor integrator with reduced sensitivity to finite amplifier gain", Electronics Letters, vol. 22, 1986, pp. 1102-1105.
Larson, L. E., and Temes, G. C.: "Switched-capacitor building-blocks with reduced sensitivity to finite amplifier gain, bandwidth, and offset voltage", ISCAS, 1987, pp. 334-338.
Hurst, P. J., and Levinson, R. A.: "Delta-Sigma A/Ds with reduced sensitivity to op amp noise and gain", ISCAS, 1989, pp. 254-257.

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