Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
1999-11-12
2001-03-06
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S077000
Reexamination Certificate
active
06198329
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electronic circuits, and more specifically, to an apparatus and method for determining and compensating for operating tolerances in an electronic component, such as a comparator.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is related to the following U.S. patent applications:
ATTORNEY
DOCKET NO.
TITLE
INVENTOR(S)
20661/00499
Battery Pack Monitoring
Richard E. Downs
System
Robert Mounger
20661/00500
Digitally Adaptive Biasing
Richard William Ezell
Regulator
Robert Mounger
All of the related applications are filed on even date herewith, are assigned to the assignee of the present invention, and are hereby incorporated herein in their entirety by this reference thereto.
BACKGROUND OF THE INVENTION
With the ever increasing demand put upon manufacturers of electronics for low cost and high performance, a problem that many of these manufactures of electronic devices are encountering is being able to compensate for the operating tolerances or offset characteristics of the electronic devices. Mismatch is introduced between electronic components because no components can be perfectly manufactured. For example, a comparator, in its basic form, compares two inputs to determine which one is of higher magnitude. It outputs a high or low response depending on whether a first input is higher than a second input, and in operation should operate over a wide common mode range. This means that the comparator should function properly whether operating at low or high voltages. The offset characteristics of a comparator produces a range of values for which a lower signal applied to the first terminal will still produce a low response or for which a higher signal applied to the second terminal will produce a high response.
One current way of determining and compensating for the offset between the two terminals of the comparator is through the use of capacitors, which are able to hold a charge for repeated sampling. The comparator's inputs are sampled, and by a series of switches the offset of the comparator is determined. This determined offset can then be stored on the capacitors for a short period.
However, there are several drawbacks to this method. First, charging the capacitors consumes considerable power, compared to the comparator, and must be of high fidelity. This makes the method unattractive for a low cost, low power type devices. Also, due to parasite leakages across the capacitor, the offset can be stored for only a short duration. These leakages increase with increased temperature, which limits the operating temperature of the device. The capacitors themselves will also degrade over time.
Another way of compensating for offset is by trimming the device. This method is often used for computer chips. In this method, a set of resistors is implanted on a chip. During the manufacturing process, but after the chip is made, the bias is determined and compensated for by fusing or severing the links between the resistors on the chip. On-chip trimming techniques can reduce offset voltage to a very low value.
The trimming technique has a drawback in that it is one time or a single shot operation and is therefore only provides compensation for the offset of the conditions under which it was tested. For a system that may undergo a wide range of operating conditions, trimming may not be optimal. There is also an increased cost of manufacturing when using this method.
SUMMARY OF THE INVENTION
The present invention overcomes the above identified problems as well as other shortcomings and deficiencies of existing technologies by providing a low cost, low power, accurate, and repeatable apparatus and method for determining the offset bias level in a comparator across a wide range of operating conditions and by providing the ability to compensate for this bias each time it is calculated.
The present invention takes advantage of the fact that there is no severe time constraint to determine the offset characteristics by successive approximation testing, testing one bit at a time from the least significant bit to the most significant bit, and then looking to see where the comparator changes state, or flips. Basically, the amount of offset is increased in 0.5 mV increments up to 50 mV on either input in a prescribed manner, at any present operating condition, until the output flips, which shows the amount of offset.
To make the bias determination, the input terminals are shorted together at or near the voltage at which the comparator will operate. The output of the comparator is recorded. The circuit allows varying degrees of input signal strength to be siphoned from either input terminal, in response to a digital code, which will be supplied from an outside source. The outside source also monitors the device to determine when the output flips. After determining when the output of the comparator flips, the outside device can record the setting of the digital switches and use this setting when it actually performs the comparison. A repeat of the sequence can be used to determine the bias for the opposite input. Determining which input side is tested is controlled by the digital input code.
Because the circuit can be zeroed at any time, the device is less sensitive to operating conditions. Mechanical stress, thermal stress, and other operating conditions will not significantly effect the performance if the actual comparison is done shortly after the bias calculation is performed. Further, because the offset is stored digitally as opposed to with a capacitor, the circuit can withstand extended periods of time between zeroings.
In conjunction with stipulations of a low power device, the circuit can be turned off or placed in standby mode when not in use.
The present invention is particularly useful in applications that have a wide range of operating conditions, input signal strength, temperature, mechanical stress, etc., require low power consumption, and do not require high speed. It is envisioned that this device will be used in the MILSPEC temperature range, which will make it even more reliable than capacitor storage schemes, due to their leakage.
REFERENCES:
patent: 4827222 (1989-05-01), Hester et al.
patent: 5327098 (1994-07-01), Molina et al.
patent: 5550512 (1996-08-01), Fukahori
patent: 5812005 (1998-09-01), Ezell et al.
patent: 6011417 (2000-01-01), Ezell et al.
Ezell William Richard
Mounger Robert
Dallas Semiconductor Corporation
Jenkens & Gilchrist a Professional Corporation
Tran Toan
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