Auto-selection priority circuits for plural channel adapters

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G06F 304

Patent

active

041595181

ABSTRACT:
In data processing systems of the type having a plurality of terminals connected by communication lines to a commmunications controller (CC) which assembles and manipulates the data from or to the terminals and one or more host central processing units (CPU's) to which the CC is connected by a number of channels, the CC will usually have a channel adapter unit (CA) for each channel and a processing unit to control the operations of the CC and to service the CA's in turn. It is necessary that the CA's be serviced with proper priorities to avoid unnecessary loss of information. An allocation of the proper priority is required where each CA can perform tasks of different urgency.
The CC shown has four channel adapters communicating with four channels of the CPU's. All CA's can signal for an interrupt of the processor in the CC when CA service is needed. All CA's cause processor interrupts on the same interrupt level. A built-in priority allocation system will select for service that CA which wants to perform the task of highest priority among those CA's which are ready to perform a task. In the case of several requests of equal priority, a tie-breaking system comprises a loop circuit connecting all adapters and a signal sent in one direction around the loop from the last serviced adapter to select the next adapter which will be serviced.

REFERENCES:
patent: 3581286 (1971-05-01), Beausoleil
patent: 3706974 (1972-12-01), Patrick et al.
patent: 4038641 (1977-07-01), Bouknecht et al.
Grant et al., "Priority Interrupt Queuing", IBM TDB, vol. 15, No. 10, Mar. 1973, pp. 3046-3048.

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