Auto-gain controlled digital phase-locked loop and method...

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

Reexamination Certificate

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C331S025000, C327S156000, C360S051000

Reexamination Certificate

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11161079

ABSTRACT:
A digital PLL system includes a first multiplier coupled to a phase difference signal for multiplying the phase difference signal by a first gain factor; a second multiplier coupled to the phase difference signal for multiplying the phase difference signal by a second gain factor; a digital loop filter coupled to the first multiplier and the second multiplier for providing an integral signal and a proportional signal and for generating a control signal according to the integral signal and the proportional signal; and an auto-gain control (AGC) unit coupled to the first multiplier, the second multiplier, and the digital loop filter. The AGC unit further comprises a first control unit for updating the first gain factor according to the integral signal; and a second control unit for updating the second gain factor according to the proportional signal.

REFERENCES:
patent: 5121085 (1992-06-01), Brown
patent: 5369376 (1994-11-01), Leblebicioglu
patent: 6597754 (2003-07-01), Janesch et al.
patent: 6696886 (2004-02-01), Ke et al.
patent: 6784706 (2004-08-01), Van Der Valk et al.
patent: 2006/0022656 (2006-02-01), Leung et al.

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