Auto calibration circuit for VLSI tester

Details Auto calibration circuit for VLSI tester Auto calibration circuit for VLSI tester

1986-09-22

1989-05-02

Gruber, Felix D.

Boots, shoes, and leggings

364579, 36457105, 371 22, G01R 3128, G06F 1130

Patent

active

048274372

ABSTRACT:
A calibration system for automatic test equipment for testing electronic circuits includes a cable (68) of a predetermined length connected to a common mode (74). A switch (66) connects the input of the cable to a test terminal (56) and (48). Each of the test terminals in the system is connected through a similar cable to the common node (74). A transmitter (46) and a receiver (48) are disposed at each terminal in the system and are activated at a single time to provide a incident clock edge into the terminal and to receive a reflected clock edge from the common node (74). By measuring the delay between incident and reflected clock edges for all of the terminals and comparing it with the expected delay, a relative error can be generated and a correction made. Another iteration can be repeated if necessary and a correction effected until the system is calibrated.

REFERENCES:
patent: 3889109 (1975-06-01), Blessin
patent: 4290137 (1981-09-01), Hilker
patent: 4523312 (1985-06-01), Takeuchi
patent: 4584683 (1986-04-01), Shimizu
patent: 4641306 (1987-02-01), Annecke et al.
patent: 4646299 (1987-02-01), Schinabeck et al.

Affiliated with

Also associated with

Rating

Auto calibration circuit for VLSI tester does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Auto calibration circuit for VLSI tester, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Auto calibration circuit for VLSI tester will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-590360