Auto-calibrating digital delay circuit

Details Auto-calibrating digital delay circuit Auto-calibrating digital delay circuit

1997-06-24

2000-02-15

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327262, 327278, H03K 513

Patent

active

060257458

ABSTRACT:
A delay circuit comprises a tapped delay element line constructed from delay elements with fixed delay intervals and a multiplexer for selecting the signal at one of the taps to produce a variable delay through the circuit. The multiplexer is controlled by a selection circuit which receives an input indicative of the actual delay time through the delay circuit from an oscillator constructed from the same fixed delay elements as the delay line.

REFERENCES:
patent: 5087842 (1992-02-01), Pulsipher et al.
patent: 5245231 (1993-09-01), Kocis et al.
patent: 5428309 (1995-06-01), Yamauchi et al.
patent: 5475690 (1995-12-01), Burns et al.
patent: 5731726 (1998-03-01), Farwell et al.

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