Auto-calibrated current-mode digital-to-analog converter and met

Details Auto-calibrated current-mode digital-to-analog converter and met Auto-calibrated current-mode digital-to-analog converter and met

1993-12-02

1995-08-29

Hoff, Marc S.

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

341118, H03M 168

Patent

active

054464552

ABSTRACT:
A current-mode DAC (20) includes two sub-DACs (22, 36), and a calibrated attenuator (48). One sub-DAC (22) receives least-significant-bits (LSB) of a K-bit digital input signal, and the second sub-DAC (36) receives most-significant-bits (MSB) of the K-bit digital input signal. An output of the sub-DAC (22) is attenuated by an attenuator (50), and the attenuated signal is summed with an output of the second sub-DAC (36) to form an analog output signal. A 4-phase gain adjust sample and hold circuit (49) is used to calibrate the attenuator (50). The 4-phase gain adjust sample and hold circuit (49) samples the current from the attenuator (50), and removes device mismatch effects in the attenuator (50) which cause linearity errors in the current-mode DAC (20).

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J. Hughes et al., "Switched-Current Signal Processing for Video Frequencies and Beyond", IEEE Journal of Solid-State Circuits, vol,. 28, No. 3, Mar. 93, pp. 314-322.
D. Groeneveld et al., "A Self-Calibration Technique for Monolithic High-Resolution D/A Converters", IEEE Journal of Solid-State Circuits, vol. 24, No 6, Dec. 89, pp. 1517-1522.

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