Auto-biasing circuit for current mirrors

Amplifiers – With semiconductor amplifying device – Including current mirror amplifier

Utility Patent

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Details

C323S315000, C323S316000, C330S296000

Utility Patent

active

06169456

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to current mirror circuits, and in particular, to bias circuits for current mirror circuits.
BACKGROUND OF THE INVENTION
Current circuits of various configurations are a common building block of electronic circuits. Typically, current circuits are used to form a current mirror. Current mirrors either sink or source current in such a way as to respectively receive or provide a substantially constant current to a load.
With reference to
FIG. 1
, a conventional two-transistor current mirror
100
is shown in schematic form. A reference current I
refl
is provided to a diode-connected reference transistor MN
1
which is mirrored by an output transistor MN
2
to produce an output current I
out1
. Characteristic of current mirrors, the output current I
out1
is substantially equal to the reference current I
ref1
long as the geometry of the reference transistor MN
1
is substantially the same as the geometry of the output transistor MN
2
. Those skilled in the art can appreciate however, that the ratio of the output current I
out1
to the reference current I
ref1
may be modified by changing the ratio of the geometry of the output transistor MN
2
to the reference transistor MN
1
.
The simple current mirror
100
allows for low-swing operation of an output voltage V
out1
of a load, but suffers from poor output resistance.
FIG. 2
is a graph which shows the relationship between the output current I
out1
along the ordinate direction and the output voltage V
out1
along the abscissa. The response graph of the current mirror
100
is divided between a triode region
200
and a saturation region
204
. The saturation region
204
is defined as the output voltage V
out1
being larger then a saturation voltage V
DS(sat)2
of the output transistor MN
2
. In general, the saturation voltage V
DS(sat)
is defined as the drain-to-source voltage of a transistor necessary to begin operation of that transistor in the saturation region which is shown as the “knee” of the curve in FIG.
2
. While operating in the saturation region
204
, changes in output voltage V
out1
at the load have little effect on the output current I
out1
. However, while operating in the triode region
200
, changes in output voltage V
out1
at the load have great effect on the output current I
out1
. In other words, the output voltage V
out1
can swing as low as the saturation voltage V
DS(sat)2
before the output resistance becomes unacceptably affected. Although the simple current mirror
100
provides for a low-swinging output voltage, those skilled in the art can appreciate, that the output resistance is still undesirably low while operating in the saturation region
204
.
With reference to
FIG. 3
, a conventional cascode current mirror
300
is drawn in schematic form. A first reference transistor MN
3
and second reference transistor MN
4
, which are diode connected, form the reference leg
308
of the cascode current mirror while a first output transistor MN
5
and second output transistor MN
6
form the output leg
312
. The second output transistor MN
6
is known as a cascode transistor and serves to buffer output voltage V
out2
swings from the first output transistor MN
5
such that the first output transistor MN
5
is more likely to remain operating in saturation.
Conventional cascode current mirrors
300
provide excellent output resistance at the expense of a lower swing on the output voltage V
out2
(i.e., the ability of the output voltage V
out2
to swing low while maintaining a high output resistance). With reference to
FIG. 4
, a graph of the relationship between output current I
out2
along the ordinate direction and output voltage V
out2
along the abscissa is shown. When both the first and second output transistors MN
5
, MN
6
are in the saturation region
408
, the output current I
out2
remains nearly constant as the output voltage V
out2
changes. In other words, the output resistance is extremely high while the output transistors MN
5
, MN
6
are saturated. However, as the second output transistor MN
6
passes into the triode region
404
the output resistance decreases. The output resistance decreases further when both the first and second output transistors MN
5
, MN
6
pass into the triode region
400
. For both output transistors MN
5
, MN
6
to remain in saturation
408
, Equation 1 must be satisfied:
V
out(min)2
>V
t
+V
DS(sat)5
+V
DS(sat)6
  (1)
Equation 1 merely states the minimum output voltage V
out(min)2
cannot fall below the sum of a threshold voltage V
t
, the saturation voltage V
DS(sat)5
of the first output transistor MN
5
and the saturation voltage V
DS(sat)6
of the second output transistor MN
6
. Where the voltage threshold term V
t
is a process variable which is generally the same for all NMOS transistors for a particular semiconductor process and can be defined by the following Equation 2:
V
t
=V
GS
−V
DS(sat)
  (2)
Where V
GS
is the gate-to-source voltage of a transistor. Stated another way, the threshold voltage V
t
defines the gate-to-source voltage V
GS
at which a conduction channel forms between the drain and source. If however, the output voltage falls below the point defined by Equation 1, at least one of the output transistors MN
5
, MN
6
will begin operating in the triode region which significantly decreases the output resistance. It should be noted, that although the output resistance of the cascode current mirror
300
is greater than that of the simple current mirror
100
, the low-swing of the cascode current mirror
300
is considerably higher than the low-swing of the simple current mirror
100
.
Output resistance of a current mirror is important because it defines how the output current will change as the output voltage changes. Operating the transistors of the output leg MN
2
, MN
5
, MN
6
of a current mirror
100
,
300
in the saturation region significantly increases the output resistance. Additionally, the use of the cascode current mirror
300
increases the output resistance when compared to the simple current mirror
100
.
Headroom is important because it defines the range in which the output voltage V
out2
may operate. The lowest swing of the output voltage V
out(min)2
defines the lower limit of the headroom, while the positive power supply V
DD
generally defines the upper limit of the headroom (i.e., V
out(max)2
=V
DD
). Any load circuit which uses the current mirror generally operates within the range defined by the headroom to assure adequate output resistance. Recently, there has been a trend toward lower voltage power supplies V
DD
, because of their reduced power consumption. However, reducing the power supply V
DD
impinges upon the upper range of the headroom V
out(max)2
available to the load circuit utilizing the current mirror. Accordingly, there is a need to increase headroom for current mirrors without reducing output resistance.
SUMMARY OF THE INVENTION
In accordance with the present invention, an auto-biased cascode current circuit capable of improved range in headroom is disclosed. In one embodiment, the current circuit includes a current mirror and a bias circuit, where the current mirror contains a reference leg and an output leg. A reference current flows within the reference leg. Included in the output leg is an output terminal, a first output transistor and a second output transistor. The output terminal operates at an output potential. The bias circuit regulates the reference leg of the current mirror such that the output potential is substantially equal to a drain-to-source saturation voltage of the first output transistor plus a drain-to-source saturation voltage of the second output transistor plus a predetermined overdrive voltage. The predetermined overdrive voltage is a design parameter which is less than a threshold voltage. Even as the reference current changes, the bias circuit regulates the reference leg so that the reference current may change significantly while the bias circuit still maintains a p

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