Audio muting circuit and audio muting method

Telecommunications – Receiver or analog modulated signal frequency converter – Signal selection based on frequency

Reexamination Certificate

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Details

C455S212000

Reexamination Certificate

active

07734265

ABSTRACT:
In an audio muting circuit, after a short delay from a first time at which a first mute signal generation circuit causes a first mute signal to fall from “H” level to “L” level, a second mute signal generation circuit causes a second mute signal to fall from “H” level to “L” level at a second time. A third mute signal generated by combining the first and second mute signals is caused to fall from “H” level to a predetermined level at the first time, and caused to fall from the predetermined level to “L” level at the second time. Thus, at the start of muting, the level of an audio signal is increased in stepwise manner. In this way, noise generated at the start of muting can be reduced.

REFERENCES:
patent: 411163648 (1999-06-01), None
patent: 3073853 (2000-09-01), None
patent: 2000-341047 (2000-12-01), None
patent: 2003-289222 (2003-10-01), None
Partial English Translation of Japanese Registered Utility Model No. 3073853, Date of Registration: Sep. 27, 2000, Date of Publication: Dec. 15, 2000, 2 pages.
Patent Abstracts of Japan, Publication No. 2000-341047, Publication Date: Dec. 8, 2000, 1 page.
Patent Abstracts of Japan, Publication No. 2003-289222, Publication Date Oct. 10, 2003, 1 page.

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