Data processing: speech signal processing – linguistics – language – Audio signal bandwidth compression or expansion
Reexamination Certificate
1998-04-17
2002-08-06
Dorvil, Richemond (Department: 2654)
Data processing: speech signal processing, linguistics, language
Audio signal bandwidth compression or expansion
C704S501000
Reexamination Certificate
active
06430533
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to decoding and reconstruction of two channel MPEG-1 and/or multi-channel MPEG-2/AC-3 audio data. More specifically, the invention relates to decoding and reconstruction of audio data by performing a functional partitioning of the MPEG-1, MPEG-2 and AC-3 audio decoding algorithms, which partitioning allocates some of the decoding steps to be done in hardware and the remaining tasks to be done in firmware.
Various standards have been developed for the purpose of providing digitally encoded audio data that can be reconstructed to provide good quality audio playback. In the late 1980s, a digital audio/video reconstruction standard known as “MPEG” (for Motion Pictures Experts Group) was promulgated by the International Standards Organization (ISO). MPEG syntax provides an efficient way to represent audio and video sequences in the form of compact coded data. MPEG unambiguously defines the form of a compressed bit stream generated for digital audio/video data. Given the knowledge of the MPEG rules, one can thus design a decoder which reconstructs an audio/video sequence from the compressed bit stream.
MPEG was initiated in the early 1990s to define a syntax for higher quality audio playback for broadcast video. The MPEG-1 audio standard is described in a document entitled “Coding of Moving Pictures and Associated Audio for Digital Storage Media at up to about 1.5 MBit/s” (Part 3 Audio) 3-11171 rev 1 (1995) (hereinafter “the MPEG-1 Document”). The MPEG-2 audio standard is described in a document entitled “Generic Coding of Moving Pictures and Associated Audio Information” ISO/IEC 13818-3 (1994) (hereinafter “the MPEG-2 Document”). Both standards documents are incorporated herein by reference for all purposes. Both documents are available from ISO/IEC Case Postale 56, CH-1211, Geneva 20, Switzerland.
A competing standard employing Dolby
processing and known as “AC-3” has also been developed by the United States Advanced Television Systems Committee for digital encoding and decoding of audio data. This standard is described in the “Digital Audio Compression (AC-3)” draft ATSC STANDARD” AC3STD68.DOC (1994) (hereinafter “the AC-3 Document”) which is available from Dolby Laboratories, Inc. located in San Francisco, Calif. and is incorporated herein by reference for all purposes.
The MPEG-2 audio decoding algorithm requires certain steps such as decoding of bit allocation, decoding of scale factors, variable length decoding of audio samples, requantization of samples, inverse discrete cosine transform matrixing, and windowing. The AC-3 audio decoding algorithm requires certain steps such as bit allocation, dequantization, decoupling, rematrixing, dynamic range compression, inverse fast fourier transform, and windowing and de-interleaving.
By way of example, audio decoder solutions like Six Channel Dolby Digital Surround Processor, Two Channel Dolby AC-3/MPEG-1 Audio Decoder, Programmable Dolby Digital AC-3/MPEG-2 Processor available from Zoran Corporation of Santa Clara, Calif. 6 Channel Audio Decoder IC, available from Thompson Multimedia of Hannover, Germany, and other products available from Compcore, USA and Aureal Inc, USA offer a purely software design or a purely hardware design. These designs, however, fail to offer the capability of decoding multi-channel audio and reconstruct a programmable number of output audio channels (specified by a customer) at a low system clock.
While CPU digital processing power has improved markedly in recent years, the purely software/firmware implementation alone cannot effectively decode the sheer volume of encoded audio data that must be rapidly decompressed and played back when decoding multi-channel MPEG-1, MPEG-2 or AC-3 audio data. CPUs like SPARC from Sun Microsystems, Inc. of Mountain View, Calif., MIPS from Silicon Graphics, Inc. of Mountain View, Calif., Pentium from Intel Corporation of Santa Clara, Calif., etc. cannot, in themselves, handle MPEG-2 audio decoding because they cannot meet the multi-channel audio frame decode time requirements at low system clock frequencies. Current designs described above decode AC-3 multi-channel audio data at a higher system clock and therefore require higher-power consumption. Furthermore, fully software/firmware-based audio decoders require large sized Code ROMs to achieve the decoding functionality, and are expensive.
A complete hardware implementation, which may employ a multiplier, for example, comes at the expense of large number of transistor device gates that consume a large chip area.
Thus, it would be desirable to find a way to perform a functional partitioning of the MPEG-1, MPEG-2 and AC-3 audio decoding algorithms such that the partitioning allocates some of the decoding steps to be done in hardware and the remaining tasks to be done in firmware.
SUMMARY OF THE INVENTION
The present invention provides a reusable hardware layout (“core”) for performing some, but not all, MPEG and AC-3 audio decoding functions. The functional blocks comprising this “audio core” define a unique hardware architecture which can be used with additional hardware or software for performing those MPEG and AC-3 audio decoding functions not performed by the audio core.
Hereinafter, except where distinctions between the two versions of the MPEG standard exist, the terms “MPEG-1” and “MPEG-2” will be used interchangeably to reference those audio decoding algorithms promulgated in the original MPEG-1 Document as well as in the MPEG-2 Document, and any future versions of MPEG decoding. Likewise, the term “AC-3” is intended to refer to not only the current AC-3 standard, but any other versions of this standard that exist now or are developed in the future.
A chip designer may use the audio core of this invention to expedite the designing of an MPEG or AC-3 audio decoder. However, because the audio core of this invention performs only some of the MPEG and AC-3 decoding steps, the designer is free to design blocks, optimized for the designer's purposes, to perform the remaining MPEG and/or AC-3 functions. The audio core of this invention is particularly useful for expeditiously designing “system” chips containing multiple cores on a single chip. Such cores might include, for example, the audio core of this invention, a video core, and a CPU core.
A significant benefit of an audio core derives from its availability for repeated use in many different chips for different applications. In each such chip, the audio decoding functions specified by the audio core can be employed without redesign. Thus, the audio core may be used on a first integrated circuit having a first integrated circuit design and on a second integrated circuit having a second integrated circuit design, with the first and second integrated circuit designs having at least some features not in common. If a system chip is employed, the first integrated circuit design may include a first collection of cores, while the second integrated circuit may include a second collection of cores, etc.—even though the first and second collections of cores have at least one core not in common.
The audio core design itself is preferably stored on a machine readable media such as a magnetic or optical storage unit. The information content of the core preferably includes a series of hardware layouts specifying the locations and features of various circuit elements comprising the audio core architecture. Ultimately, the audio core design is implemented as hardware on one or more chips. Thus, the audio core design exists as both an intangible description of hardware and as the actual hardware itself.
In a preferred embodiment, the audio decoder core design specifies that at least the following MPEG and AC-3 functions are performed by the hardware: sub-band synthesis (or “matrixing”), downmixing and windowing. These functions are detailed in the MPEG Document and the AC-3 Document (as “Transformation Equations”). In especially preferred embodiments, other MPEG-2 and AC-3 functions such as bit allocation decoding, scale f
Kolluru Mahadev S.
Soman Satish S.
Dorvil Richemond
LSI Logic Corporation
Maiorana PC Christopher P.
Opsasnick Michael N.
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