Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1996-06-03
2002-09-17
Ver Steeg, S. H (Department: 1753)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S079000, C430S313000, C430S320000, C430S323000, C438S710000, C438S719000
Reexamination Certificate
active
06451706
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to a method of reducing surface reflectivity and eliminating directional reflection lights from substrates during photolithography processes in the manufacture of integrated circuits.
(2) Description of the Prior Art
Referring to
FIG. 1
, there is shown a portion of a partially completed integrated circuit in which there is a silicon substrate
10
. Field oxide regions
12
are formed in and on the silicon substrate resulting in a uneven topography of the top surface of the substrate. A layer
14
of polysilicon is deposited over the surface of the substrate. A layer of photoresist
16
coats the surface of the polysilicon layer
14
and planarizes the substrate. When the photoresist is exposed to actinic light, light waves
18
will reflect off the polysilicon surface onto the unexposed portion of the photoresist
20
. After the photoresist is developed, as shown in
FIG. 2
, notches
22
will be found in the resulting photomask. These notches
22
are caused by directional reflection lights.
Anti-reflection coatings (ARC) have been used in semiconductor manufacturing to suppress reflection lights during the masking process. The use of ARC's allows for the definition of sharp images and the avoidance of resist notching. However, these additional ARC layers are expensive, require additional process steps, and difficult to control in manufacturing.
U.S. Pat. No. 5,324,689 to Yoo teaches a different method of avoiding resist notching. Yoo uses a spin-on-glass layer underlying the photoresist layer. This allows the photoresist layer to have a uniform thickness, thus avoiding the reflection problem caused by the differing photoresist depths.
SUMMARY OF THE INVENTION
Accordingly, it is a principal object of the present invention to provide an effective and very manufacturable method of avoiding resist notching during photolithography across an uneven topography.
Another object of the present invention is to reduce surface reflectivity of surfaces having an uneven topography.
A further object of the present invention is to eliminate directional reflection lights from substrates.
Yet another object is to create micro light traps which reduce surface reflectivity and eliminate directional reflection lights from substrates.
In accordance with the objects of this invention a new method of avoiding resist notching in the formation of a polysilicon gate electrode in the fabrication of an integrated circuit device is achieved. Bare active areas are provided surrounded by field oxide isolation on a semiconductor substrate wherein the surface of the substrate has an uneven topography due to the uneven interface between the active areas and the isolation. A polysilicon layer is deposited over the active areas and the field oxide isolation of the substrate. The surface of the polysilicon layer is roughened using a plasma etching process wherein pits are formed on the surface which act as light traps. The roughened polysilicon layer is covered with a layer of photoresist. Portions of the photoresist layer are exposed to actinic light wherein reflection lights from the actinic light are trapped in the pits. The reflection lights do not reflect onto the unexposed portion of the photoresist layer. The photoresist layer is developed and patterned to form the desired photoresist mask for the polysilicon layer wherein the absence of reflection lights reflecting onto the unexposed portion of the photoresist results in the notch-free photoresist mask in the formation of a polysilicon gate electrode in the fabrication of an integrated circuit device.
REFERENCES:
patent: 4454044 (1984-06-01), Hackleman et al.
patent: 5007982 (1991-04-01), Tsuo
patent: 5182234 (1993-01-01), Meyer
patent: 5324689 (1994-06-01), Yoo
patent: 5670298 (1997-09-01), Hur
Chu Ron-Fu
Lin Qun Ying
Pan Yang
Zhou Mei Sheng
Chartered Semiconductor Manufacturing Ltd.
Pike Rosemary L. S.
Saile George O.
Ver Steeg S. H
LandOfFree
Attenuation of reflecting lights by surface treatment does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Attenuation of reflecting lights by surface treatment, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Attenuation of reflecting lights by surface treatment will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2854492