Atomic planar-doped field-effect transistor

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357 16, H01L 2980

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active

049807315

ABSTRACT:
An atomic planar-doped field-effect transistor is disclosed, which is featured by a channel region of a limited thickness between source and drain with at least one atomic planar-doped layer formed therein and a barrier layer or layers provided on the upper or lower side or on the both sides of the channel region. The channel region is formed of a semiconductor of a low impurity concentration or of an n-type with the atomic planar-doped layer having high concentration donor impurities or of a p-type with the atomic planar-doped layer having high concentration acceptor impurities. The upper barrier layer is provided between the channel region and a gate electrode and the lower barrier layer, if present, is provided between the channel region and a substrate. They are formed of a semiconductor of a low impurity concentration which is different from the semiconductor of the channel region and makes a heterojunction with the channel region and which has a smaller electron affinity than the semiconductor of the channel region having the donor planar-doped layer or a larger value of a sum of electron affinity and energy gap than the semiconductor of the channel region having the acceptor planar-doped layer. With the upper barrier layer, the transistor of the present invention has a large gate-forward turn-on voltage. The short channel effects are suppressed by adding the lower barrier layer to the transistor.

REFERENCES:
patent: 4157556 (1979-06-01), Decker et al.
patent: 4641161 (1987-02-01), Kim et al.
patent: 4727403 (1988-02-01), Hida et al.
Japanese Journal of Applied Physics, vol. 24, No. 8, pp. L608-L610 (1985) by Schubert et al.
IEEE Transactions on Electron Devices, vol. ED-33, No. 5, pp. 625-632 (1986) by Schubert et al.

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