Multiplex communications – Fault recovery – Bypass an inoperative switch or inoperative element of a...
Reexamination Certificate
2000-04-10
2004-02-24
Pham, Chi (Department: 2667)
Multiplex communications
Fault recovery
Bypass an inoperative switch or inoperative element of a...
C370S244000
Reexamination Certificate
active
06697327
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an ATM (Asynchronous Transfer Mode) switching system which is used for the sake of communication of the cell while multiplexing the cell efficiently.
DESCRIPTION OF THE PRIOR ART
FIG. 1
shows a conventional ATM (Asynchronous Transfer Mode) switching system. According to the conventional ATM switching system, it causes the system of an active system switch S
1
(current application system) to be switched to a stand-by system switch S
2
(subsequent application system) in accordance with the instruction of the microprocessor which is not illustrated. The microprocessor causes an input selector
10
connected to a circuit to execute switching such that only the input cell for respective switches S
1
, and S
2
is switched to the subsequent application system. The stand-by system switch S
2
stores therein the input cell while stopping output operation temporarily until when the whole cells are sent out from the inside of the cell temporal storage device
30
on the inside of the active system switch S
1
. Avacancy monitor
70
monitors the inside of the cell temporal storage device
30
. A result of the monitoring according to the vacancy monitor
70
informs that there is vacant port. According to the monitoring result, an output operation of the stand-by system is permitted in order of the port whose cell temporal storage device
30
of the active system becomes vacant. Simultaneously, the output selector
50
in the output side executes switching, thus causing the output cell from the stand-by system to be transmitted to the circuit.
Further, the cell temporal storage device
30
of the output ports of the active system becomes vacant, before the output operation of the cell is commenced from the output ports of the stand-by system. On this occasion, sequence of the system switching ends, thus returning to stationary operation. According to these operations, switching becomes possible without loss of the cell even though the duplicate switches are switched.
On the other hand, in order to maintain quality of delay priority of respective cells, as shown in
FIG. 2
, a delay priority selector
40
is introduced so as to add the delay priority selector
40
to the constitution of FIG.
1
. There is provided a system switching controller
20
instead of the vacancy monitor
70
. At the time of switching of the system, it causes the cell to be read in order of height of delay priority from among the cells stored in both of the temporal storage devices of the active system and the stand-by system. Such a switching system is disclosed in the official report of the Japanese Patent Application Laid-Open No. HEI 11-17696. Furthermore, ITU-T recommendation or the document of The ATM Forum defines both characteristics of the above delay priority and abolition priority by using term Quality of Service (hereinafter referred to as “QoS”).
However, in the conventional ATM switching system, various kinds of problems occur. Under normal conditions, when there is none of storage of the cell at all within the cell temporal storage device
30
, it is possible to execute switching without problems. While when there is a little storage of the cell, even though quantity thereof is very little, within the cell temporal storage device
30
, the following problem occurs. For instance, according to the invention described in the official report of the Japanese Patent Application Laid-Open No. HEI 6-6372, the cell with low delay priority is stored in the active system. Subsequently, the cell with high delay priority flows therein. On this occasion, switching of the system is implemented. In this case, the whole cells within the cell temporal storage device
30
of the active system flows out therefrom completely, before it causes the cell to flow out successively from the cell temporal storage device
30
of the stand-by system. Supposing that operation is confined at the time of system switching, the delay priority is disregarded. The cell of the cell temporal storage device of the active switching system is sure to flow out on the occasion of the system switching. As a result thereof, even though there exists a cell with high delay priority, passage delay of the high-priority cell becomes large on the inside of the ATM switch, and thus, there is the problem that delay quality deteriorates.
Furthermore, according to the invention of the Japanese Patent Application laid-Open No. HEI 11-17696, the cell with high delay priority is always outputted while giving the cell priority during system switching. For that reason, the cell with low delay priority becomes difficult to be read-out from the cell temporal storage device
30
of the active system. Further, unless the whole cells are outputted, which cells are stored in the cell temporal storage device
30
of the active system, the system switching is not completed. Thus, there is the problem that the time required for system switching increases. Namely, the cell of the traffic class (for instance CBR: Constant Bit Rate) whose outgoing destination is settled beforehand in regard to bandwidth to be used occupies this bandwidth of the circuit fully. On this occasion, the cell of the traffic class (for instance ABR: Address Base Resistor or VBR: Variable Bit Rate) is not outputted, whose bandwidth reservation is not performed beforehand in regard to outgoing destination, and is stored in the cell temporal storage device
30
of the active system. Thus, the system switching is not completed. Consequently, forced switching according to timeout of the software is executed. As a result, there is the problem that abolition of the cell of the ABR traffic with high abolition priority occurs.
SUMMARY OF THE INVENTION
In view of the foregoing it is an object of the present invention, in order to overcome the above-mentioned problems, to provide an ATM switching system which enables processing of system switching to be executed in a short time according to duplicate switches while maintaining prescribed service quality on the occasion of system switching.
According to a first aspect of the present invention, in order to achieve the above-mentioned object, there is provided an ATM (Asynchronous Transfer Mode) switching system which comprises an input selector for dividing cell inputted from a circuit between an active system switch and a stand-by system switch, a system switching controller which is provided for the active system switch and the stand-by system switch respectively in order to execute control of system switching, a cell temporal storage device which is provided for the active system switch and the stand-by system switch respectively for storing temporarily therein the inputted cell in every service quality class or in every outgoing destination, a delay priority selector for reading-out the cell with high delay priority successively to output from the respective cell temporal storage device under control of the system switching controller, and an output selector for outputting the cell of the delay priority selector to circuit, wherein the ATM switching system causes output of the cell to be executed for the sake of the delay priority selector from the cell temporal storage device of active system after condition that there becomes none of the cell whose delay priority is higher than that of the cell stored in the active system according to read-out control of the cell from the cell temporal storage device of stand-by system on the occasion of the system switching.
According to a second aspect of the present invention, in the first aspect, there is provided an ATM switching system, wherein it causes the cell of class of low abolition priority stored in the cell temporal storage device of the active system to be abolished after elapsing fixed time from commencement of system switching in the condition that the cell with low delay priority is stored in the cell temporal storage device of the active system.
According to a third aspect of the present invention, in the first aspect, there is provided
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