Multiplex communications – Diagnostic testing – Fault detection
Reexamination Certificate
2002-07-12
2004-06-29
Marcelo, Melvin (Department: 2663)
Multiplex communications
Diagnostic testing
Fault detection
C370S395600, C370S395710
Reexamination Certificate
active
06757254
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an asynchronous transfer mode (ATM) switching apparatus applicable to a short cell suitable for transferring low-bit rate information.
2. Description of Related Art
Upon carrying out communications by the ATM, data is loaded in a payload which is called an ATM cell which is a unit of data switching. The ATM cell is transmitted throuh an ATM connection setting previously. The ATM cell, when transmitted within the ATM network, is allocated with one destination information (virtual path identifier/virtual channel identifier (VPI/VCI)) per ATM connection. The VPI/VCI are loaded in the header of the ATM cell. The ATM cell is transmitted through the ATM connection corresponding to the VPI/VCI.
In the technical field relating to mobile communication, data is converted into a compressed low-bit rate data format for its transmission so that a communication band may effectively be used. If the low-speed bit rate information is loaded a payload of a standard ATM cell, much time require so that the payload of one ATM cell is filled with data. For this reason, there is a fear that there occurs a delay in data transmission and a drop in communication quality.
Under the above circumstances, a multiplexing transfer system called AAL Type 2 (hereinafter referred to as AAL2) as a system capable of transmitting low-bit rate information with less delay has been investigated while focusing on ITU-T.
FIGS. 10 and 11
are diagrams showing AAL2 formats.
FIG. 12
is a diagram showing a concept of a transfer system according to the AAL2. In FIG.
10
(A), the header of an AAL type 2 format cell (hereinafter referred to as AAL2 cell) has a format in which each field (start field: 1 byte) of OSF, SN, P is newly added to the format of a header of a standard cell.
A short cell also consists of a fixed-length short cell header and a variable-length short cell payload. A short cell connection identifier (CID) for identifying a short cell connection and a length indicator (LI) showing the payload length of the short cell are embedded in the short cell header.
Information of the low-bit rate described above is embedded in the short cell payload. A plurality of short cells are stored in the AAL2 cell. In this case, when a part of the short cells is not stored in the payload of a single AAL2 cell, as shown in
FIG. 12
, the remaining parts of the short cells are mapped in the subsequent AAL2 cell (called overlapping). Then, the AAL2 cell is transmitted on a given ATM connection in accordance with VPI/VCI stored in the AAL2 cell header. Hereinafter, □AAL2 cell□ is prescribed to be meant by an AAL2 cell storing a plurality of short cells.
However, upon transmitting the AAL2 cell by using the ATM connection as described above, there occurred the following problems. Namely, a plurality of short cells having different CIDs are multiplexed in the payload of the AAL2 cell. Therefore, each short cell is not transmitted to a desired destination unless an ATM switching apparatus carries out switching per short cell. However, conventional ATM switching apparatuses are not incorporated with a function of processing the short cells embedded in the payload of the ATM cell. Therefore, switching per short cell could not be carried out.
Thus, the ATM switching apparatus has to have a function of switching per short cell. In this case, preferably, the ATM switching apparatus has a configuration to process the ALL2 cell to thereby carry out the switching per short cell, in order to make the configuration required for materializing the function simple.
Then, in the ATM switching apparatus, by extracting a plurality of short cells from the AAL2 cell inputted into the ATM switching apparatus itself, producing a plurality of ATM standard cells (hereinafter referred to as partial fill cell: see FIG.
10
(B)) in which each short cell is stored in the payload one by one, and carrying out switching per partial fill cell, it enables switching per short cell.
In view of the above, the present inventors have filed a patent application, before filing this application, in which an apparatus for demultiplexing the AAL2 cell into a plurality of partial fill cells (short cell demultiplexer), and an apparatus for multiplexing a AAL2 cell from a plurality of partial fill cells (short cell multiplexer) are disclosed (Japanese Patent Application Laid-open No. Hei 8-332319, hereinafter referred to as prior application).
However, in the prior application, the formats of cells to be inputted into the short cell demultiplexer and the short cell multiplexer are different with each other. For that reason, even if those apparatuses disclosed in the prior application are installed in an ATM switching apparatus, the formats of the cells to be inputted/outputted into/from the ATM switching apparatus are not made coincide with each other.
It is also expected that cells other than the AAL2 format may be inputted to the ATM switching apparatus. Accordingly, it is preferred that the ATM switching apparatus is so arranged as being capable of handling various format of cells.
In addition, when the ATM switching apparatus carries out the switching operation for per short cell, it is preferable that the ATM switching apparatus includes means for ensuring the normality of its operation. However, the ensuring means for the switching operation for the short cell has not yet been established with respect to the AAL2.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above-mentioned problems, and has an object of the present invention to provide an ATM switching apparatus applicable to a short cell, in which switching per short cell can be made, and formats of the cells to be inputted/outputted can be made coincide with each other.
To solve the above-mentioned problems, the present invention employs the following arrangement. Namely, in the present invention, an ATM switching apparatus applicable to the short cell is comprised of an ATM switch for outputting a cell inputted thereinto from an output path corresponding to its identifier, an interface unit, a demultiplexer, and a multiplexer, which are connected to the ATM switch. In the ATM switching apparatus according to the present invention, when a cell in which a plurality of short cells are stored, is inputted to the interface unit, the interface unit outputs the cell to the ATM switch, while setting an identifier of the cell so that the cell is then outputted to the demultiplexer. The demultiplexer also receives the cell outputted from the interface unit through the ATM switch to produce a plurality of standard cells in which a plurality of short cells stored in the cell are stored one by one, and outputs the standard cells to the ATM switch, while setting the identifiers of the standards cells so that the standard cells are then outputted to the multiplexer. The multiplexer also receives a plurality of standard cells outputted from the demultiplexer through the ATM switch to produce a cell storing a plurality of short cells in accordance with the identifiers of the standard cells, and outputs the cell to the ATM switch, while setting the identifier of the cell so that the cell is then outputted from a predetermined output path.
According to the ATM switching apparatus of the present invention, it is capable of carrying out a switching process for per short cell by using the ATM switch carrying out a switching process for an ordinary ATM cell. The cell storing a plurality of the short cells is an AAL Type 2 format cell, for example. Further, the interface unit, the demultiplexer, and the multiplexer may be composed of an electric circuit such as an IC and an LSI and a processor system mainly consisting of a CPU and a memory.
REFERENCES:
patent: 5909428 (1999-06-01), Saito et al.
patent: 6021135 (2000-02-01), Ishihara et al.
patent: 6483810 (2002-11-01), Ono et al.
patent: 6490286 (2002-12-01), Ono et al.
patent: 6671289 (2003-12-01), Tamura et al.
patent: 8-086576 (1996-07-01), None
Fujisawa Toru
Ono Hideaki
Takechi Ryuichi
Fujitsu Limited
Katten Muchin Zavis & Rosenman
Marcelo Melvin
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