Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2004-10-22
2008-03-04
Pham, Chi (Department: 2616)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S388000, C370S396000
Reexamination Certificate
active
07339935
ABSTRACT:
An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.
REFERENCES:
patent: 5127000 (1992-06-01), Henrion
patent: 5199027 (1993-03-01), Barri
patent: 5337308 (1994-08-01), Fan
patent: 5343468 (1994-08-01), Rau
patent: 5355372 (1994-10-01), Sengupta et al.
patent: 5485457 (1996-01-01), Aramaki
patent: 5557621 (1996-09-01), Nakano et al.
patent: 5748614 (1998-05-01), Wallmeier
patent: 5953341 (1999-09-01), Yamanaka et al.
patent: 6046983 (2000-04-01), Hasegawa et al.
patent: 6128278 (2000-10-01), Joffe et al.
patent: 6134217 (2000-10-01), Stiliadis et al.
patent: 6160805 (2000-12-01), Averbuch et al.
patent: 6335930 (2002-01-01), Lee
patent: 6647017 (2003-11-01), Heiman
patent: 0 471 380 (1992-02-01), None
patent: 0 553 798 (1993-08-01), None
patent: 0 833 480 (1998-04-01), None
patent: 2-195758 (1990-08-01), None
patent: 4-252632 (1992-09-01), None
patent: 5-207062 (1993-08-01), None
patent: 6-77984 (1994-03-01), None
patent: 6-252948 (1994-09-01), None
Hitoshi Obara “Design of a Multistage Self-Routing Switch with a Distributed Cell Sequence Control” Electronics & Communications in Japan, Part I—Communications, Scripta Technica. New York, US, vol. 73, No. 10, Oct. 1, 1990, pp. 14-27.
Akihiko Takase et al. “Datapath archtecture and technology for large scale ATM switching systems” Global Telecommunications Conference, 1996. Globecom '96. Communications: The Key to Global Prosperity London, UK Nov. 18-22, 1996, New York, NY, USA, IEEE, US, Nov. 18, 1996, pp. 1395-1399.
Ryozo Kishimoto et al. “Self-Routing Benes Network Distributively Controlled by Dynamic Load Balance” Electronics & Communications in Japan, Part I—Communications, Scripta Technica. New York, US, vol. 73, No. 9 Part 1, Sep. 1, 1990, pp. 1-11.
Hitoshi Obara “Design of a Multistage Self-Routing Switch with a Distributed Cell Sequence Control” Electronics & Communications in Japan, Part I—Communications, Scripta Technica. New York, US, vol. 73, No. 10, Oct. 1, 1990, pp. 14-27.
P.C. Wong et al. “Pipeline banyan—a parallel fast packet switch architecture” Discovering a New World of Communications. Chicago, Jun. 14-18, 1992. Bound Together With B0190700, vol. 3, Proceedings of the International Conference on Communications, New York, IEEE, US, vol 4, Jun. 14, 1992, pp. 882-887.
Sying-Jyan Wang “Load-Balancing in Multistage Interconnection Networks under Multiple-Pass Routing” Journal of Parallel and Distributed Computing, Academic Press, Duluth, MN, US, vol. 36, No. 2, Aug. 1, 1996, pp. 189-194.
European Search Report, issued Jan. 13, 2005.
Tom Chaney, J. Andrew Fingerhut, Margaret Flucke, Jonathan S. Turner “Design of a Gigabit ATM Switch” IEEE Infocom'97, 1997.
Jonathan S. Turner, N. Yamanaka “Architectural Choices in Large Scale ATM Switches” IEICE Trans. Commun., vol. E81-B. No. 2, Feb. 1998.
M. Collivignarelli, A. Daniele, G. Gallassi, F. Rossi, G. Valsecchi, L. Verri “System and Performance Design of the ATM Node UT-XC” SUPERCOMM/ICC'94.
G. Balboni, M. Collivignarelli, L. Licciardi, A. Paglialunga, G. Rigolio, F. Zizza “From Transport Backbone to Service Platform: facing the broadband switch evolution” ISS'95.
M.A. Henrion, G. J. Eilenberger, G.H. Petit, P. Parmentier “Technology, Distributed Control and Performance of a Multipath Self-Routing Switch” ISS'92.
Oki, et al, “A Scalable Distributed Arbitration in High-Speed ATM Switches”, IEICE General Conference, B-6-41, 1997.
Yasukawa, et al., “Multi-Route ATM Switch Which Conserve Cell Sequence in Tournament Manner”, IEICE General Conference, B-6-19 1998.
ROXANNE exchange, Martin de Prycker : Asynchronous Transfer Mode Solution for Broadband ISDN, Ellis Horwood.
de Prycker, Asynchronous Transfer Mode Solution for Broadband ISDN, 2nded. 1993; pp. 152-203.
Nabeshima Masayoshi
Oki Eiji
Takaya Naoki
Yamanaka Naoaki
Yasukawa Seisho
Kenyon & Kenyon LLP
Mills Donald L
Nippon Telegraph and Telephone Corporation
Pham Chi
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