ATM switch circuit configuration system

Multiplex communications – Wide area network – Packet switching

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Details

370 60, H04J 324

Patent

active

052873587

ABSTRACT:
The present invention relates to an ATM cell switch system in a broadband ISDN, and specifically to an ATM cell switch system where the number of a header part as a destination data of a cell except header error control data and the number of an information part have a common divisor. To realize a switch circuit in a hierarchical structure applicable to an LSI system, the circuit comprises an ATM cell divider for dividing an ATM cell into unit cells each having a 1-bit header part or sub-cells each having a multi-bit header part, an ATM cell switch for switching said unit cells or sub-cells according to the header data, and an ATM cell output unit for assembling an ATM having a header part corresponding to the number of output lines of the switch circuit and outputting the result from said corresponding output lines.

REFERENCES:
patent: 4864558 (1989-09-01), Imagawa et al.
patent: 4999835 (1991-03-01), Lagoutte

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