ATM switch address generating circuit

Details ATM switch address generating circuit ATM switch address generating circuit

1996-07-12

1998-09-29

Marcelo, Melvin

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

370429, H04L 1254

Patent

active

058154990

ABSTRACT:
The proposed address generating circuit of an ATM (asynchronous transfer mode) switch can support a plurality of service classes by use of a single LSI under such a management that the cell buffers are divided for each service class. That is, an address generating circuit of shared buffer type ATM switch for an ATM switch system comprises a plurality of address generating units (5) each for storing a routing tag indicative of a cell output port, an address, and class data indicative of a service class of each of data cells stored in shared cell buffers. When data cells are inputted to and outputted from the shared cell buffers, the routing tags and the addresses of the address generating units (5) each having matching cell class data are selected and used.

REFERENCES:
patent: 5455825 (1995-10-01), Lauer et al.
patent: 5612952 (1997-03-01), Motoyama
patent: 5696764 (1997-12-01), Soumiya et al.

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