ATM switch address generating circuit

Details ATM switch address generating circuit ATM switch address generating circuit

1996-07-15

1998-10-13

Ton, Dang

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

370428, 370395, H04L 1256

Patent

active

058223169

ABSTRACT:
The proposed address generating circuit of a shared-buffer type ATM (asynchronous transfer mode) switch adopts such an address management method that the ports multi-plexed by time division for each input link can be switched to each output link through time division multiplexing. The address generating circuit of shared-buffer type ATM switch used for an ATM switching system comprises a plurality of address generating units (4) each for storing an address, port data and output link data of a cell stored in each shared buffer in time series manner; two port pointer registers (8a, 8b, 8c, . . . ) for storing data indicative of a current output port for each output link; and a port list table (9) for storing data of ports accommodated in each output link.

REFERENCES:
patent: 5272696 (1993-12-01), Munter et al.
patent: 5311509 (1994-05-01), Heddes et al.

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