ATM memory with reduced noise transient

Details ATM memory with reduced noise transient ATM memory with reduced noise transient

1995-05-22

1996-11-19

Marcelo, Melvin

Multiplex communications

Wide area network

Packet switching

370 941, G11C 502

Patent

active

055770363

ABSTRACT:
An asynchronous transmission mode (ATM) memory array capable of storing one ATM packet of data is an n x m array of memory locations, each memory location capable of storing one bit. The array has n columns, where n is the number of bits in an ATM cell of data, and m rows, where m is the number of cells in an ATM packet. The memory array has a plurality of input lines, one for each of said n columns, which together receive n bits simultaneously. It also has n ground lines, one for each of said n columns in said array, each ground line connected to one memory location in each of said n columns in its row; such that each ground line carries the current of only one bit, thereby reducing the noise transients.

REFERENCES:
patent: 5309395 (1994-05-01), Dickinson et al.
patent: 5422838 (1995-06-01), Lin

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