ATM inverse multiplexing system

Multiplex communications – Communication techniques for information carried in plural... – Assembly or disassembly of messages having address headers

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370395, 370535, 370389, H04J 302

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active

058751920

ABSTRACT:
An ATM inverse multiplexing cell-based system for reducing error-multiplication due to error events in the transmitted cell stream, which includes a first IMA assembly having an input coupled to an incoming cell stream from a first ATM layer device, a second IMA assembly having an output coupled to a second ATM layer device, a plurality of links coupling the first IMA assembly to the second IMA assembly. The first IMA assembly includes a multiplexer for multiplexing the incoming cell stream onto the plurality of links and for inserting onto the links framing cells in the form of "st" cells in place of idle cells and "S" cells to mark divisions in each channel corresponding to a given number of cells or a given time interval between successive "S" cells. An encoder encodes and inserts cell location information of both control cells and payload cells. The second IMA assembly includes a plurality of link buffers for receiving cells transmitted along respective ones of links. A demultiplexer demultiplexes cells by aligning "S" cells on the link buffers and releasing payload cells for CDV smoothing. A decoder extracts and decodes location information from the framing cells to identify errored or missing cells and to mark the location of those cells. A discriminator distinguishes between errors in a header and errors in a payload of an errored cell and flushes all cells in the same frame on each link upon failure to identify an "unknown" cell before encountering buffer overflow.

REFERENCES:
patent: 5606558 (1997-02-01), Daniel et al.
patent: 5608733 (1997-03-01), Vallee et al.
patent: 5761191 (1998-06-01), VanDervort et al.

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