Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-03-16
2001-04-17
Nguyen, Chau (Department: 2739)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S467000, C370S525000
Reexamination Certificate
active
06219350
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switch system, and more particularly to an ATM (Asynchronous Transfer Mode) cell converting apparatus provided with a tone and DTMF (Dual Tone Multifrequency) generating function and a method using the same.
2. Description of the Conventional Art
Generally, an ATM switch system which asynchronously transmits various information has data transmission speed which is considerably faster than a synchronous transmitting system. Accordingly, in recent years many efforts have been made to apply the ATM switch system to a broadband ISDN (Integrated Services Digital Network) and accordingly various interfaces have been standardized. However, since a great cost is required to replace the existing networks with ATM networks, another substitutive method has been suggested, which mutually uses the existing TDM (Time Division Multiplex) networks and the ATM networks.
FIG. 1
is a diagram illustrating a conventional ATM cell converting device for operating both of the TDM network and the ATM network. As shown therein, the conventional ATM cell converting device consists of a state/timing signal generating unit
11
, a FIFO
12
, a cell transmission control unit
13
, a memory interface
14
, a memory unit
15
, a CPU interface
16
, a data converting unit
17
, a line data demultiplexing unit
18
and a serial/parallel converting unit
19
.
Specifically, the state/timing signal generating unit
11
generates frame synchronous signals, clock signals, state signals, trunk numbers and time slot numbers (channel numbers) in accordance with a clock signal CLK, a synchronous pulse signal Syn_P and a condition signal which are outputted from a CPU (not shown). Here, the generated frame synchronous signal is inputted to the cell transmission control unit
13
, the data converting unit
17
and the serial/parallel converting unit
19
, the state signal, the trunk number and the time slot number (the channel number) are inputted to the data converting unit
17
.
The FIFO
12
stores an ATM cell inputted through an ATM transmission line which is connected to an ATM switching network, and the cell transmission control unit
13
stores in the memory unit
15
the ATM cell which has been stored in the FIFO
12
through the memory interface
14
, based upon a VCI (Virtual Channel Identifier) of a cell header region, in accordance with the frame synchronous signal.
The memory interface
14
matches the cell transmission control unit
13
, the CPU interface
16
and the data converting unit
17
to the memory unit
15
, arbitrates signals inputted (outputted) to(from) the memory unit
15
in accordance with the clock signal outputted from the state/timing signal generating unit
11
and notifies the cell transmission control unit
13
, the CPU interface
16
and the data converting unit
17
of an arbitrating result.
Further, the memory unit
15
includes a link table, a cell buffer control table, a cell header table and a cell buffer. In
FIGS. 3 and 4
, the link table and the cell buffer control table, respectively, are illustrated in more detail. Further,
FIG. 5
illustrates a map file of the memory unit
15
. As shown therein, the elements thereof are respectively allocated by corresponding to trunks and time slots.
The link table connects time slot data in each trunk with a cell buffer. Here, an address of each item of the link table has a one-to-one correspondence with a trunk number and a time slot number and a content of each item indicates a cell buffer number. Further, the cell buffer control table stores information necessary to each cell buffer, while the cell header control table stores header information of an ATM cell. In addition, in the cell buffer 1 time slot data on a trunk line are sequentially stored byte by byte.
The CPU interface
16
interfaces signals which are inputted and outputted between the CPU (not shown) and the memory interface
14
, and the data converting unit
17
reads and outputs 1-byte channel data of the ATM cell type to the demultiplexing unit
18
, in accordance with the trunk number and time slot number (the channel number) which are outputted from the state/timing signal generating unit
11
. Then, the line data demultiplexing unit
18
inverse-multiplexes the 1-byte channel data outputted from the data converting unit
17
to parallel data in accordance with the trunk number, and the serial/parallel converting unit
19
converts the 1-byte parallel data which have been inverse-multiplexed to serial data which are to be outputted to trunks(#0~#k−1) of the TDM system.
In such a conventional ATM cell converting apparatus, the ATM cell which is inputted through the ATM cell transmission line is stored in the FIFO
12
, and the cell transmission control unit
13
reads the ATM cell from the FIFO
12
and stores the cell in the memory unit
15
in accordance with the frame synchronous signal. That is, on the basis of VCI information which is stored in the header region of the ATM cell, the ATM cell which has been read is stored through the memory interface
14
in a corresponding cell buffer of the memory unit
15
.
Further, the data converting unit
17
, being synchronized with the frame synchronous signal, reads the channel data from a cell buffer of the memory unit
15
in accordance with the trunk number and the time slot number which are outputted from the state/timing signal generating unit
11
every time slot period and outputs the data to the line data demultiplexing unit
18
. The line data demultiplexing unit
18
applies time division inverse multiplexing, in accordance with the time slot, to the 1-byte channel data outputted from the data converting unit
17
which are to be 1-byte parallel data. Accordingly, the serial/parallel converting unit
19
converts the 1-byte parallel data outputted from the line data demultiplexing unit
18
to serial data and outputs the converted data to the trunks(#0~#k−1) of the TDM system.
Next, to describe the operation of a FSM (Finite State Machine) which outputs the ATM cell to the line data demultiplexing unit
18
byte by byte, first the FSM is installed in the data converting unit
17
and transits its state in accordance with a state signal outputted from the state/timing signal generating unit
11
. Here, a whole cycle of the FSM is accomplished in the 1 time slot, and the state signal has a period in which the 1 time slot is divided into K, wherein K is the total number of trunks.
First, when a system reset signal Sys_rst is inputted, an initialization is performed to a hardware and a software of the ATM cell converting apparatus. Then, when an initialization end signal End_init is inputted, the FSM is transited to a CPU access state. In such a state, the CPU (not shown) sets through the CPU interface and the memory interface the link table, the cell buffer control table and the cell header table provided in the memory unit
15
. Here, access to the memory unit
15
by another hardware blocks is prohibited. The memory unit
15
is more detailedly illustrated in FIG.
5
.
Further, when the synchronous pulse signal Syn_P is inputted, the FSM is transited to a link table access state, and the state/timing signal generating unit
11
generates and outputs to the FSM the state signal, the frame synchronous signal, the trunk number and time slot number (the channel number).
Accordingly, in such a link table access state, the FSM reads a cell buffer number allocated in a channel of each trunk and a call set bit (APV) with respect to the corresponding channel from the link table, as shown in
FIG. 3
, in accordance with the trunk line number and the time slot number (the channel number) which are outputted from the state/timing signal generating unit
11
. For example, the FSM reads a cell buffer number #
1
which corresponds to a channel
1
of a trunk #
0
and a call set bit (APV) of the channel
1
. If no call is set in the corresponding channel (APV=0), the FSM accesses the link table af
Fleshner & Kim LLP
Lee Chiho Andrew
LG Information & Communications Ltd.
Nguyen Chau
LandOfFree
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