ATIP bit data generator and method for generating ATIP bit...

Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal level detecting using a reference signal

Reexamination Certificate

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C369S059270, C369S059120

Reexamination Certificate

active

06980500

ABSTRACT:
An ATIP (absolute time in pre-groove) bit data generator free from an uneven duty cycle. The ATIP bit data generator includes an analog processor, a high-frequency clock generator, a first decoder, a sync pattern detector, and a second decoder. The analog processor receives a signal generated from an optical pickup, and further processes the signal to generate an ATIP FM signal. The high-frequency clock generator provides a high-frequency clock using the ATIP FM signal as a reference signal. The first decoder receives the ATIP FM signal and the high-frequency clock and generates bi-phase data. The sync pattern detector receives the bi-phase data and the high-frequency clock, and generates a sync indication signal. The second decoder counts the pulse number of the high-frequency clock for each counting cycle, and the counting cycle includes a plurality of half periods of the ATIP FM signal. When the pulse number is smaller than a lower threshold value or greater than a upper threshold value, the second decoder outputs ATIP bit data with a first level. When the pulse number is between the lower threshold value and the upper threshold value, the second decoder outputs ATIP bit data with a second level.

REFERENCES:
patent: 4942565 (1990-07-01), Lagadec
patent: 5506824 (1996-04-01), Fairchild et al.
patent: 6125089 (2000-09-01), Shigemori

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