Asynchronous transfer mode switching arrangement providing broad

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 941, H04Q 1104

Patent

active

052710041

ABSTRACT:
An asynchronous transfer mode switching arrangement includes a serial to parallel converter arranged to receive input packets of data, which include routing information, in serial form and convert the packets of data to parallel form. A first random access memory is provided in which each packet of data is entered at an addressed location into the memory, and the address is entered in a respective first-in first-out output queue at the tail. The address at the head of the queue is accessed and the packet of data is read from the first random access memory into a parallel to serial converter and the packet of data is serially delivered to the associated output. The first random access memory and the output queues are controlled by a memory management arrangement to which is connected a broadcast channel routine second random access memory. The memory management arrangement addresses the broadcast channel routine second random access memory with channel index information, and receives information identifying the required output ports.

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patent: 5062106 (1991-10-01), Yamazaki et al.

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