Asynchronous transfer mode switch including cell counter verific

Details Asynchronous transfer mode switch including cell counter verific Asynchronous transfer mode switch including cell counter verific

1996-12-18

1999-08-17

Chan, Jason

Multiplex communications

Diagnostic testing

Determination of communication parameters

370413, H04J 316

Patent

active

059403772

ABSTRACT:
An ATM switch having multiple input and output ports is provided. The ATM switch receives ATM cells through the input ports and outputs the ATM cells through one of the output ports in accordance with output port information included in the ATM cells. An output buffer is also provided for each of the output ports to store ATM cells to be output through the output port. A cell counter is provided for each of the output buffers to count the number of ATM cells being stored in the output buffer. Additionally, the ATM switch includes counter verification circuitry for determining whether the cell counters are correctly counting the number of ATM cells stored in the output buffers. In one preferred embodiment, the counter verification circuitry includes a global cell counter that counts the total number of ATM cells being stored in all of the output buffers, an accumulator that determines the total number of ATM cells counted by the cell counters, and a comparator for comparing the accumulated count value with the global count value. Thus, the proper operation of the cell counters can be verified. This minimizes the possibility of improper operation due to a malfunction, even when the ATM switch is operated continuously for a long time period.

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Yasuo Unekawa, et al., A 5Gb/s 8.times.8 ATM Switch Element CMOS LSI Supporting 5 Quality-of-Service Classes with 200MHz LVDS Interfaces, Semiconductor Device Engineering Laboratory.
Takeo Koinuma, et al., "ATM in B-ISDN Communication System and VLSI Realization", 1994, Symposium on VLSI Circuits of Technical Papers.

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