Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Patent
1996-09-30
1999-08-31
Kizou, Hassan
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
370414, H04L 1228, H04L 1256
Patent
active
059463104
ABSTRACT:
A processor bus PBS connecting each LSI and a micro processor has been removed in an asynchronous transfer mode ATM switch in order to reduce number of contact terminals for LSIs, which are employed to constitute the asynchronous transfer mode ATM switch. The ATM switch may comprise a plurality of LSIs connected in cascade, each for processing asynchronous transfer mode cells for a predetermined stage; a processor for outputting control information addressed to the plurality of the LSIs, and receiving control cells sent from the plurality of the LSIs; a converting circuit operatively connected to the processor for making the control cells outputted from the processor into cells to output to the plurality of LSIs, receiving the control cells sent from the plurality of LSIs, and converting the control cells into control information including an address and data to input to the processor; a control cell inserting circuit operatively connected to a first LSI of the plurality of the LSIs for inserting the control cells sent from the converting circuit to the asynchronous transfer mode cells, and inputting the control cells to the first LSI; and a control cell extracting circuit operatively connected to a last LSI of the plurality of the LSIs for extracting the control cells sent through the plurality of the LSIs.
REFERENCES:
patent: 5619500 (1997-04-01), Hiekali
patent: 5663959 (1997-09-01), Nakagawa
patent: 5781320 (1998-07-01), Byers
Fujitsu Limited
Kizou Hassan
Qureshi Afsar M.
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