Asynchronous transfer mode switch

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

H04L 1256

Patent

active

061222798

ABSTRACT:
A switching device for switching ATM cells from a plurality of network input links to a plurality of network output links comprises a plurality of ports containing line interfaces and input and output buffers, a hardware switch controller, a microprocessor, and memory for storing routing tables and system software. All these elements are interconnected via a processor bus, and additionally, the ports are interconnected by a separate switching bus. The switch controller employs hash-based routing table indexing to route cells from selected input ports to appropriate output ports according to the cells' header information. Switch requests generated by incoming cells are arbitrated using a token bus allocation scheme. The majority of cells are switched almost entirely in hardware, but the microprocessor can assume control of the switching architecture to resolve exception conditions and to perform special processing on selected virtual circuits. Two output buffers per port are provided; one for high-priority cell, another for lower priority cells. Additionally, a common overflow buffer is provided to temporarily store cells intended for output buffers momentarily full.

REFERENCES:
patent: 4791629 (1988-12-01), Burns et al.
patent: 5062106 (1991-10-01), Yamazaki et al.
patent: 5165021 (1992-11-01), Wu et al.
patent: 5210749 (1993-05-01), Firoozmand
patent: 5235592 (1993-08-01), Cheng et al.
patent: 5235595 (1993-08-01), O'Dowd
patent: 5237565 (1993-08-01), Henrion et al.
patent: 5241536 (1993-08-01), Grimble et al.
patent: 5265207 (1993-11-01), Zale et al.
patent: 5285446 (1994-02-01), Yonehara
patent: 5311513 (1994-05-01), Ahmadi et al.
patent: 5313454 (1994-05-01), Bustini et al.
patent: 5315593 (1994-05-01), Adachi et al.
patent: 5323389 (1994-06-01), Bitz et al.
patent: 5341376 (1994-08-01), Yamashita
patent: 5359592 (1994-10-01), Corbalis et al.
patent: 5361255 (1994-11-01), Diaz et al.
patent: 5381410 (1995-01-01), Grenot
patent: 5390176 (1995-02-01), Schoute et al.
patent: 5394397 (1995-02-01), Yanagi et al.
patent: 5396490 (1995-03-01), White et al.
patent: 5533720 (1996-07-01), Bryan et al.
patent: 5550323 (1996-08-01), Irie et al.
Silberschatz et al., Operating System Concepts, 3d Ed., Addison-Wesley Publishing Co., 1991, pgs. 118-19.
Giacopelli, J. N. et al., "Sunshine: A High-Performance Self-Routing Broadband Packet Switch Architecture," IEEE Journal On Selected Areas In Communications, vol. 9, No. 8, Oct. 1, 1991.
Schultz, K. J. et al., "Distributed Multicast Contention Resolution Using Content Addressable FIFOs," Serving Humanity Through Communications, Supercom/ICC, New Orleans, May 1-5, 1994, vol. 3, May 1994, Institute of Electrical and Electronics Engineers, pgs. 1495-1500.
Raskovic et al., "An Implementation of Hash Based ATM Router Chip", in Proceedings of the Twenty-Eighth Hawaii International Conference on System Sciences, vol. I: Architecture, The Institute of Electrical and Electronics Engineers, Inc., pp. 32-40 (1995).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Asynchronous transfer mode switch does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Asynchronous transfer mode switch, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Asynchronous transfer mode switch will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1080657

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.