Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Patent
1996-12-06
1998-09-22
Chin, Wellington
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
370469, H04J 114
Patent
active
058125507
ABSTRACT:
An asynchronous transfer mode (ATM) layer function processing apparatus with an enlarged structure is disclosed including: an ATM layer receiving cell processor for storing a cell start signal and cell input data extracted by use of a cell read clock in a buffer when a cell transmissible signal is received from an input signal of a subscriber physical layer function processor, extracting a flag according to the number of stored cells, and performing a multiplexing operation according to a scheduling algorithm using a cell interrupt signal and the extracted flag; a processor interface for forming a cell from data received from a microprocessor, storing the cell in a buffer, generating the cell interrupt signal, and controlling each constituent of the ATM layer function processing apparatus; an ATM layer transmitting cell processor for performing an input cell routing function according to an output port identifier value when a corresponding routing value and a match signal are generated from a connection table, and performing output cell routing, broadcasting and selective broadcasting functions according to the field allocation of an appropriate output port identifier value; and a function mode processor for independently connecting the ATM layer receiving and transmitting cell processors to network and subscriber physical layer function processors connected to each physical link according to a control signal of the processor interface.
REFERENCES:
patent: 5418786 (1995-05-01), Loyer et al.
A New ATM Multiplexer With Dynamic Scheduling; Wen-Tsuen Chen, Nen-Fu Huang, Pi-Rong Sheu and Yaw-Ren Chang; 1991; pp. 136-139.
Performance analysis of a dynamic priority scheduling method in ATM networks; T.-Y. Huang and J.-L.C. WU; 1993; pp. 285-290.
The ATM Layer Chip; An ASIC for B-ISDN Applications; Cesar A. Johnston and H. Jonathan Chao; 1001; pp. 741-750.
Doh Yoon Mi
Kim Jong Oh
Sohn Sung Won
Chin Wellington
Electronics and Telecommunications Research Institute
Korea Telecommunication Authority
Vu Huy D.
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