Asynchronous transfer mode (ATM) interconnection system for mult

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

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370402, 370420, H04Q 1104, H04U 308

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active

056234945

ABSTRACT:
A system of the invention connects an Asynchronous Transfer Mode (ATM) data network to a plurality of host units. The data network transfers data in the form of ATM cells. A plurality of ATM termination units are connected between the network and the host units respectively. Each termination unit includes a virtual channel memory for storing ATM cells; a processor for segmenting and reassembling the ATM cells stored in the memory; a network interface for transferring ATM cells including segmented Conversion Sublayer Payload Data Units (CS-PDU)s between the memory, the processor and an ATM network; and a host interface for transferring unsegmented CS-PDUs between the memory, the processor and a host unit. The processor of each termination unit includes a computing unit, and a programmable instruction memory for storing a program for controlling the computing unit. The system further includes an Advanced Programmable Interrupt Controller (APIC) system for distributing interrupts from the network to the host units. The APIC system includes a plurality of local units for prioritizing and passing interrupts to the termination units respectively; and an Input/Output (I/O) unit for receiving interrupts from the network, determining to which host units interrupts are addressed, and feeding interrupts to local units corresponding to host units to which interrupts are addressed. Termination units and corresponding APIC local units may be formed on a single integrated circuit chip, and the chip may include ATM I/O units and/or processors constituting the host.

REFERENCES:
patent: 5446726 (1995-08-01), Rostoker et al.
patent: 5481725 (1996-01-01), Jayakumar et al.
patent: 5511200 (1996-04-01), Jayakumar

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