Asynchronous-to-synchronous digital data multiplexer/demultiplex

Multiplex communications – Wide area network – Packet switching

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Details

3701101, H04J 322, H04J 312

Patent

active

047590149

ABSTRACT:
Digital data is received on a plurality of input channels at unrelated, asynchronous input clock rates. The data is multiplexed and transmitted via one or more synchronous parallel channels, together with encoded information related to the original asynchronous input clock rate on each channel. The data received from the synchronous channels is demultiplexed and redistributed to proper output channels and clocked out therefrom at rates derived from the encoded and reconstituted asynchronous clock rate information from each channel.

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patent: 4612636 (1986-09-01), Grover et al.
patent: 4617658 (1986-10-01), Walters
patent: 4692894 (1987-09-01), Bemis

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