Asynchronous system-on-a-chip interconnect

Details Asynchronous system-on-a-chip interconnect Asynchronous system-on-a-chip interconnect

2007-07-03

2007-07-03

Tran, Khanh (Department: 2611)

Pulse or digital communications

Transmitters

C710S317000, C370S360000

Reexamination Certificate

active

10634597

ABSTRACT:
Methods and apparatus are described relating to a system-on-a-chip which includes a plurality of synchronous modules, each synchronous module having an associated clock domain characterized by a data rate, the data rates comprising a plurality of different data rates. The system-on-a-chip also includes a plurality of clock domain converters. Each clock domain converter is coupled to a corresponding one of the synchronous modules, and is operable to convert data between the clock domain of the corresponding synchronous module and an asynchronous domain characterized by transmission of data according to an asynchronous handshake protocol. An asynchronous crossbar is coupled to the plurality of clock domain converters, and is operable in the asynchronous domain to implement a first-in-first-out (FIFO) channel between any two of the clock domain converters, thereby facilitating communication between any two of the synchronous modules.

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