Asynchronous/synchronous data receiver circuit

Details Asynchronous/synchronous data receiver circuit Asynchronous/synchronous data receiver circuit

1985-11-07

1988-07-05

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

375116, 375106, 375120, 34082521, 455 38, 370 92, H04L 2706

Patent

active

047560100

ABSTRACT:
In a communications system wherein a transmitted message is preceeded only by an address, an asynchronous circuit detects the address and provides an initializing signal to a synchronous clock recovery circuit so that the first bit of the recovered clock signal is synchronized to the first bit of the message. During the transmission of the message the synchronous clock recovery circuit makes minor adjustments to the phase of the recovered clock to maintain synchronization between the recovered clock and the message. At the termination of the message, the synchronous clock recovery circuit is inhibited until the asynchronous circuit detects another address.

REFERENCES:
patent: 3855576 (1974-12-01), Braun et al.
patent: 4053708 (1977-10-01), Hotchkiss
patent: 4151367 (1979-04-01), Nicolini et al.
patent: 4231114 (1980-10-01), Dolikian
patent: 4454383 (1984-06-01), Judd
patent: 4457005 (1984-06-01), Burke et al.

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