Asynchronous switching node and routing logic means for a switch

Details Asynchronous switching node and routing logic means for a switch Asynchronous switching node and routing logic means for a switch

1993-11-19

1996-04-09

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 54, 370 60, 370 941, H04Q 1104

Patent

active

055068405

ABSTRACT:
An asynchronous switching node is described for distributing cells from an input port (I1, . . . , IN) of a node (ND) to a group of output ports (LG1, . . . , Lgk) thereof. The asynchronous switching node includes switching stages (S1, S2, S3) each having a switching element (S11, . . . , S3N) with inlets (IP1-IPN) and outlets (OP1-OPN). Each switching element (S11, . . . , S3N) has a routing logic circuit (MC1; MC2; RL) for routing one of the cells from one of the inlets (IP1-IPN) of one of the switching element (S11, . . . , S3N) to one of the outlets (OP1-OPN) thereof based on an internal routing label (LGA; SRT) associated with a cell. The switching element (S11, . . . , S3N) uses the internal routing label (LGA; SRT) to identify at least one distribution tree having branches (BR1, . . . , BR6 ) which connect the input port (I1, . . . , IN) with the group of output ports (LG1, . . . , Lgk). The routing logic circuit (MC1; MC2; RL) has a preselection circuit (MB; M; RM) for preselecting under the control of the internal routing label (LGA; SRT) a set of the branches (BR1, . . . , BR6), has a selection circuit (MX; MX'; SEL) for dynamically selecting one of the branches (BR1, . . . , BR6) and has an identifier circuit for identifying a route on a selected outgoing branch (BR1, . . . , BR6) from the one switching element (S11, . . . , S3N).

REFERENCES:
patent: 4939718 (1990-07-01), Servel et al.
patent: 5097466 (1992-03-01), Kammerl
patent: 5164938 (1992-11-01), Jurkevich et al.
patent: 5214639 (1993-05-01), Herion
patent: 5309430 (1994-05-01), Verhille et al.

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