Asynchronous status interlock circuit for interface adaptor

Details Asynchronous status interlock circuit for interface adaptor Asynchronous status interlock circuit for interface adaptor

1975-02-18

1976-09-07

Shaw, Gareth D.

Communications: electrical

Digital comparator systems

340147LP, 307DIG1, 307232, 328109, H03K 520, H03K 5153

Patent

active

039797325

ABSTRACT:
An asynchronous interlock circuit for an interface adaptor circuit in a digital system includes a D-type latch, a D-type flip-flop, and an RS-type flip-flop interconnected to accept a peripheral status input from a peripheral equipment unit, a read status input and a read data input derived from control and selection inputs to the interface adaptor from a microprocessor unit of the digital system. The asynchronous interlock circuit stores information corresponding to a logical "1" on the peripheral status interrupt input in the D-type flip-flop, even if the latter signal disappears prior to acknowledgment by the microprocessor of a corresponding interrupt signal generated by the interface adaptor circuit. The D-type flip-flop is reset by a sequence of a read status signal and a read data signal, thereby avoiding problems which could arise if the peripheral status input remains at a logical "1" even after acknowledgment by the microprocessor unit of an interrupt signal generated by the interface adaptor. If a status change occurs on the peripheral status input while status is being read, the D-type latch is inhibited and the status change is not accepted until the read status operation is complete.

REFERENCES:
patent: 3452330 (1969-06-01), Avery
patent: 3639911 (1972-02-01), Frieband
patent: 3879582 (1975-04-01), White

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