Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Patent
1995-11-21
1997-04-22
Bocure, Tesfaldet
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
375362, 370305, H04L 2538
Patent
active
056235224
ABSTRACT:
An asynchronous serial data receiving device receives serial data, containing main data of bits sandwiched between a start bit and a stop bit, which are transmitted thereto in an asynchronous manner. In the device, the serial data are temporarily stored in a shift register circuit in response to high-speed clocks whose speed is higher than transmission rate of the serial data. A counter circuit counts number of the high-speed clocks. Every time a change of level is detected in the serial data, counting operation of the counter circuit is reset so that the counter circuit re-starts counting from its initial number. The change of level is detected responsive to the serial data or noise. Existence of the start bit is acknowledged on the basis of a fact that the counter circuit continues counting for a window time, without being reset, in a duration of the start bit. Herein, the window time is less than a half of the duration of the start bit. Even if the noise occurs in a former-half part of the duration of the start bit so that the counter circuit resets counting operation, the counter circuit re-starts the counting operation which is then continued for the window time; therefore, existence of the start bit is acknowledged. Thereafter, the serial data are read out from the shift register circuit and are extracted as parallel data in accordance with extraction clocks which are produced in response to the counter circuit.
REFERENCES:
patent: 3996523 (1976-12-01), Schmid
patent: 4715044 (1987-12-01), Gartner
patent: 4748643 (1988-05-01), Setoguchi et al.
patent: 5263054 (1993-11-01), Davis et al.
Bocure Tesfaldet
Webster Bryan
Yamaha Corporation
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