Asynchronous serial data receiver with capability for sampling t

Coded data generation or conversion – Digital code to digital code converters – Serial to parallel

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375106, H03M 900

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active

051554860

ABSTRACT:
An asynchronous serial data receiver utilizes plural samples of each data bit in a word to assure detection and reading of the midpoint of each bit to mitigate problems associated with noise and mismatches between the data and sampling rates. To this end, a shift register having plural stages for each bit samples the data stream at a clock rate which is a multiple of the data rate which provides multiple samples of each incoming bit. When the data word is fully read into the shift register the start bit is detected and initiates a parallel transfer of the data word using bit values taken from the midpoint of each bit period.

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Japanese Patent Abstract, vol. 8, No. 107, May 29, 1984.
Japanese Patent Abstract, vol. 7, No. 204, Sep. 9, 1983.

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