Asynchronous reset scheme for ultra-low noise port tri-state out

Details Asynchronous reset scheme for ultra-low noise port tri-state out Asynchronous reset scheme for ultra-low noise port tri-state out

1991-10-24

1993-06-01

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307263, 307451, 307473, 307572, 307596, 307606, H03K 17687, H03K 513

Patent

active

052162893

ABSTRACT:
A circuit for providing digital output signals carrying large amounts of currents without generating large transients at an output terminal connected to a load comprising apparatus for providing gradually increasing amounts of current of a first polarity to the output terminal, apparatus for providing gradually increasing amounts of current of a second polarity to the output terminal, apparatus for utilizing the apparatus for providing gradually increasing amounts of current of a first polarity to the output terminal to place the output terminal at a voltage level required for input signals, apparatus for providing a high impedance path to hold the output terminal at the voltage level required for input signals, and apparatus for disabling the apparatus for providing gradually increasing amounts of current of a first polarity and the apparatus for providing gradually increasing amounts of current of a second polarity to the output terminal.

REFERENCES:
patent: 4959565 (1990-09-01), Knecht et al.
patent: 4992676 (1991-02-01), Gerosa et al.
patent: 5036232 (1991-07-01), Jungert et al.
IMB Tech. Disc. Bul. vol. 32, No. 8A, Jan. 1990, "Rate of Current Change Controlled Off-Chip Driven with Low Shoot-Through Current".

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